文件名称:verilog
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verilog编程中的基本程序，包括比较器，编码器，解码器，移位寄存器等-verilog programming in the basic procedures, including comparators, encoders, decoders, shift registers, etc.
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下载文件列表
verilog lianxi\chengfa\chengfa.gise
..............\.......\chengfa.ise
..............\.......\chengfa.xise
..............\.......\chengfa8x8.v
..............\.......\......._xdb\tmp\ise\version
..............\.......\...........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
..............\.......\...........\...\...\............\..................\.........\HDProject_StrTbl
..............\.......\...........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
..............\.......\...........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
..............\.......\...........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
..............\.......\...........\...\...\............\................\................\dpm_project_main_StrTbl
..............\.......\...........\...\...\............\................Gui\CSourceProcessView
..............\.......\...........\...\...\............\...................\CSourceProcessView_StrTbl
..............\.......\...........\...\...\............\...................\CViewSelector
..............\.......\...........\...\...\............\...................\CViewSelector_StrTbl
..............\.......\...........\...\...\............\...................\File-SynthesisOnly
..............\.......\...........\...\...\............\...................\File-SynthesisOnly_StrTbl
..............\.......\...........\...\...\............\...................\Library-SynthesisOnly
..............\.......\...........\...\...\............\...................\Library-SynthesisOnly_StrTbl
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
..............\.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
..............\.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
..............\.......\...........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-chengfa8x8
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-chengfa8x8_StrTbl
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-mult
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-mult_StrTbl
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
..............\.......\...........\...\...\..REGISTRY__\Autonym\regkeys
..............\.......\...........\...\...\............\bitgen\regkeys
..............\.......\...........\...\...\............\...init\regkeys
..............\.......\...........\...\...\............\common\regkeys
..............\.......\...........\...\...\............\.pldfit\regkeys
..............\.......\...........\...\...\............\dumpngdio\regkeys
..............\.......\...........\...\...\............\fuse\regkeys
..............\.......\...........\...\...\............\HierarchicalDesign\HDProject\regkeys
..............\.......\...........\...\...\............\hprep6\regkeys
..............\.......\...........\...\...\............\idem\regkeys
..............\.......\...........\...\...\............\libgen\regkeys
..............\.......\...........\...\...\............\map\regkeys
..............\.......\...........\...\...\............\netgen\regkeys
..............\.......\...........\...\...\............\.gc2edif\reg
..............\.......\chengfa.ise
..............\.......\chengfa.xise
..............\.......\chengfa8x8.v
..............\.......\......._xdb\tmp\ise\version
..............\.......\...........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
..............\.......\...........\...\...\............\..................\.........\HDProject_StrTbl
..............\.......\...........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
..............\.......\...........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
..............\.......\...........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
..............\.......\...........\...\...\............\................\................\dpm_project_main_StrTbl
..............\.......\...........\...\...\............\................Gui\CSourceProcessView
..............\.......\...........\...\...\............\...................\CSourceProcessView_StrTbl
..............\.......\...........\...\...\............\...................\CViewSelector
..............\.......\...........\...\...\............\...................\CViewSelector_StrTbl
..............\.......\...........\...\...\............\...................\File-SynthesisOnly
..............\.......\...........\...\...\............\...................\File-SynthesisOnly_StrTbl
..............\.......\...........\...\...\............\...................\Library-SynthesisOnly
..............\.......\...........\...\...\............\...................\Library-SynthesisOnly_StrTbl
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
..............\.......\...........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
..............\.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
..............\.......\...........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
..............\.......\...........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-chengfa8x8
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-chengfa8x8_StrTbl
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-mult
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-mult_StrTbl
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
..............\.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
..............\.......\...........\...\...\..REGISTRY__\Autonym\regkeys
..............\.......\...........\...\...\............\bitgen\regkeys
..............\.......\...........\...\...\............\...init\regkeys
..............\.......\...........\...\...\............\common\regkeys
..............\.......\...........\...\...\............\.pldfit\regkeys
..............\.......\...........\...\...\............\dumpngdio\regkeys
..............\.......\...........\...\...\............\fuse\regkeys
..............\.......\...........\...\...\............\HierarchicalDesign\HDProject\regkeys
..............\.......\...........\...\...\............\hprep6\regkeys
..............\.......\...........\...\...\............\idem\regkeys
..............\.......\...........\...\...\............\libgen\regkeys
..............\.......\...........\...\...\............\map\regkeys
..............\.......\...........\...\...\............\netgen\regkeys
..............\.......\...........\...\...\............\.gc2edif\reg