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[VHDL编程] VerilogHDLAD7862
说明:运用VerilogHDL实现AD7862的数据采集设计-VerilogHDL achievement of the use of the data collection design AD7862<qinbo> 在 2025-01-22 上传 | 大小:370kb | 下载:0
[VHDL编程] 143637___fpgas_and_cplds
说明:vhdl couter 3 bit and make by vhdl and vhdl<qbirax> 在 2025-01-22 上传 | 大小:2.01mb | 下载:0
[VHDL编程] cycloneIII3c120dev
说明:This document describes the hardware features of the Cyclone® III development board, including detailed pin-out information to enable you to create custom FPGA designs that interface with all components of the board.-<rfanddsp> 在 2025-01-22 上传 | 大小:800kb | 下载:0
[VHDL编程] CPU_Architecture
说明:Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks. External hardware accelerator is used for network pack<Amit Adoni> 在 2025-01-22 上传 | 大小:2.28mb | 下载:0
[VHDL编程] EnDatlightversion
说明:海德汉绝对值编码器的ENDAT2.2协议代码,用于编码器数据的解码,然后把得到的数据传送给DSP处理,我们公司用于高精度伺服驱动器上。-Heidenhain encoder absolute agreement ENDAT2.2 code encoder data for decoding the data and then transmitted to the DSP processing, our company for high-<王中超> 在 2025-01-22 上传 | 大小:27kb | 下载:4