资源列表
[VHDL编程] 38018066-VHDL
说明:INTRODUCTION § The VHSIC Hardware Descr iption Language (VHDL) is an industry standard language used to describe hardware from the abstract to concrete level. § The language not only defines the syntax but also d<phitoan> 在 2025-03-07 上传 | 大小:125kb | 下载:0
[VHDL编程] 50973937-VHDL-Report
说明:Introduction This report is organized as following.First, it is divided into chapter 2 to chapter 12. Within each chapter, VHDL code is presented at the beginning of each problem. Then, simulation results for these<phitoan> 在 2025-03-07 上传 | 大小:993kb | 下载:0
[VHDL编程] 34105908-Multipliers-Using-Vhdl
说明:ABSTRACT: Low power consumption and smaller area are some of the most important criteria for the fabrication of DSP systems and high performance systems. Optimizing the speed and area of the multiplier is a major d<phitoan> 在 2025-03-07 上传 | 大小:371kb | 下载:0
[VHDL编程] 38504873-pll
说明:Introduction In 2004 Octavian Florescu created the UW ASIC group. At that time, the analog subgroup of the UW ASIC group was involved in the design of a PLL. The topology of that PLL, which is now referred to as Ph<phitoan> 在 2025-03-07 上传 | 大小:358kb | 下载:0
[VHDL编程] 40716003-VHDL
说明:What is VHDL? • VHDL stands for VHSIC Hardware Descr iption Language. • VHSIC is an abbreviation for Very High Speed Integrated Circuit, a project sponsered by the US Government and Air Force begun<phitoan> 在 2025-03-07 上传 | 大小:86kb | 下载:0
[VHDL编程] 44317447-Vhdl-Sim-Syn
说明:This document is meant to be an introduction to VHDL both as a simulation language and an input language for automatic logic synthesis. It is based on material originally prepared for the ASIC Design Laboratory taugh<phitoan> 在 2025-03-07 上传 | 大小:107kb | 下载:0