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[VHDL编程assg-8-(barrel-shifter)-final

说明: Barrel shifter IN VHLD , using structural modelling
<milind> 在 2025-02-24 上传 | 大小:128kb | 下载:0

[VHDL编程assg-5-(serial-bit-adder)

说明:4 bit adder using four full adder’s structural modeling style
<milind> 在 2025-02-24 上传 | 大小:64kb | 下载:0

[VHDL编程miaobiao

说明:用VHDL语言实现对FPGA的程序编写,实现秒表功能。-Using VHDL FPGA program written stopwatch function.
<秦丽媛> 在 2025-02-24 上传 | 大小:364kb | 下载:0

[VHDL编程jiafaqi

说明:用VHDL语言实现对FPGA的程序编写,实现加法器功能。-FPGA program written using VHDL adder function.
<秦丽媛> 在 2025-02-24 上传 | 大小:218kb | 下载:0

[VHDL编程liushuideng

说明:应用VHDL语言实现FPGA的编程,实现流水灯功能。-Application VHDL language for FPGA programming, light water feature.
<秦丽媛> 在 2025-02-24 上传 | 大小:235kb | 下载:0

[VHDL编程anjianshumaguan

说明:应用VHDL语言实现对FPGA的程序编写,实现按键数码管的功能。-Using VHDL language to write FPGA procedures to achieve the key function of the digital tube.
<秦丽媛> 在 2025-02-24 上传 | 大小:88kb | 下载:0

[VHDL编程assg-9-1-(lift-controller)

说明:Lift Controller in vhdl using process statement and state disgram
<Milind> 在 2025-02-24 上传 | 大小:20kb | 下载:0

[VHDL编程assg-9-2-(trafic-light-controller)

说明:Traffic light Controller in vhdl using process statement and state disgram
<Milind> 在 2025-02-24 上传 | 大小:111kb | 下载:0

[VHDL编程ethernet_10ge_mac_latest.tar

说明:The 10GE MAC core is designed for easy integration with proprietary custom logic. It features a POS-L3 like interface for the datapath and a Wishbone compliant interface for management. The core was intentionally desi
<ke> 在 2025-02-24 上传 | 大小:905kb | 下载:0

[VHDL编程sockit_owm_latest.tar

说明:1-wire master written in Verilog HDL, ready for integration into a FPGA or ASIC based SoC. A port of the 1-wire Public Domain Kit (version 3.10r2) from Maxim is also provided, with all the code required for integratio
<ke> 在 2025-02-24 上传 | 大小:536kb | 下载:0

[VHDL编程Elliptic_Curve_Group_latest.tar

说明:椭圆曲线群的核心是计算在椭圆曲线群的两个元素的加入,并在椭圆曲线组相同的元素的加入。-The Elliptic Curve Group core is for computing the addition of two elements in the elliptic curve group, and the addition of identical elements in the elliptic curve group.
<ke> 在 2025-02-24 上传 | 大小:567kb | 下载:0

[VHDL编程Tate_Bilinear_Pairing_latest.tar

说明:The Tate Bilinear Pairing core is for calculating Tate bilinear pairing especially on super-singular elliptic curve in affine coordinates defined over a Galois field , whose irreducible polynomial is . (For improving
<ke> 在 2025-02-24 上传 | 大小:482kb | 下载:0
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