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[VHDL编程] shfiting-output-achieved-by-verilog
说明:该代码用Verilog语言实现了移位输出功能,主要实现对输入信号进行移位输出,已通过仿真验证。-The code in Verilog realize the shift output function, the main achievement of the input signal shift output has been verified by simulation.<daruili> 在 2025-01-21 上传 | 大小:3kb | 下载:0
[VHDL编程] weimafashengqi-achieved-by-verilog
说明:该代码用Verilog语言实现了M序列的伪码产生,伪码特征方程为X13 +X7+X5+1,已通过仿真验证。-The code in Verilog realize the M-sequence pseudo-code generation, pseudo-code characteristic equation for the X13+ X7+ X5+ 1, it has been verified by simulation.<daruili> 在 2025-01-21 上传 | 大小:3kb | 下载:0
[VHDL编程] CORDIC_CODES_NEW
说明:Cordic VHDL codes full working-Cordic VHDL codes full working..<guruprasad sp> 在 2025-01-21 上传 | 大小:3kb | 下载:0
[VHDL编程] 1553_module
说明:MIL-1553B RT controller output shown in BC(RT-BC) VHDL code<shyamu> 在 2025-01-21 上传 | 大小:3kb | 下载:1