资源列表
[VHDL编程] IIC_communication_experiment
说明:BJ-EPM240V2实验例程以及说明文档实验之十IIC通信实验-BJ-EPM240V2 experimental test routines as well as documentation of the communication experiment IIC<王建毅> 在 2025-02-13 上传 | 大小:462kb | 下载:0
[VHDL编程] Verilog-IIC
说明:VerilogHDL语言编写的IIC 读写试验程序, 在Quartus II 8.1下面调试通过 -IIC VerilogHDL languages to read and write test procedures, the Quartus II 8.1 debugging through the following<Joseph> 在 2025-02-13 上传 | 大小:462kb | 下载:0
[VHDL编程] CPLD-FPGA-project-doesnt-fit
说明:CPLD/FPGA编译时提示“project doesn t fit! do you wish to override some existing settings and/or assignments?解决方法-CPLD/FPGA编译时提示“project doesn t fit! do you wish to override some existing settings and/or assignments?”<李文强> 在 2025-02-13 上传 | 大小:461kb | 下载:0
[VHDL编程] CPUwithout-cache
说明:5级流水无cache,CPU实验,是学习VHDL的好资料,对于了解CPU很有帮助!-5-stage pipeline without cache, CPU test, is learning VHDL good information, very helpful for understanding the CPU!<张洋> 在 2025-02-13 上传 | 大小:461kb | 下载:0
[VHDL编程] wtut_vhd
说明:spartan 3E 1600开发板的秒表计时器源程序,VHDL语言-source code of timer on spartan 3E1600 development board in VHDL<zhangjianghan> 在 2025-02-13 上传 | 大小:461kb | 下载:0
[VHDL编程] RS232_COMPLETE
说明:Communication RS232 between Hyperterminal PC to FPGA Spartan 3E<MarceloBG> 在 2025-02-13 上传 | 大小:461kb | 下载:0
[VHDL编程] Intro-VHDL-3-part1
说明:intro VHDL part 3 section 1, electronic enginering<Volta> 在 2025-02-13 上传 | 大小:461kb | 下载:0
[VHDL编程] priority_decoder
说明:Verilog Code for priority decoder<gotu0000> 在 2025-02-13 上传 | 大小:461kb | 下载:0
[VHDL编程] DDC中的抽取滤波器设计及FPGA实现
说明:本文对下变频模块中抽取滤波进行了详细的分析,并详细阐述了其FPGA的实现过程和方法(In this paper, the decimation filtering in the down conversion module is analyzed in detail, and the realization process and method of FPGA are discussed in detail)<davidbmd > 在 2025-02-13 上传 | 大小:461kb | 下载:0