资源列表
[VHDL编程] viterbi
说明:verilog程序,实现了(2,1,4)卷积码编码,和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder<xiongherui> 在 2025-02-03 上传 | 大小:3kb | 下载:0
[VHDL编程] shift_reg_ps
说明:this VHDL program can get a 64bit paralel data and make a serial data with SCLK and WCLK.<Taher Aghazadeh> 在 2025-02-03 上传 | 大小:1kb | 下载:0
[VHDL编程] shift_reg_sp
说明:this VHDL Progran get a SCLK(seril CLock) and a WCLK(Word CLOCK) with a serial data line and return a 64nits Parallel data.<Taher Aghazadeh> 在 2025-02-03 上传 | 大小:1kb | 下载:0
[VHDL编程] WRCTRL
说明:this VHDL Program get a 64 bit data and send it to a SDRAM-controller block to write into SDRAM and then get a 64bits data from SDR-block<Taher Aghazadeh> 在 2025-02-03 上传 | 大小:2kb | 下载:0
[VHDL编程] SAMP_RATE
说明:this VHDL program can count and measure a time of high-level of a signal by a high-frequency refrence signal.<Taher Aghazadeh> 在 2025-02-03 上传 | 大小:1kb | 下载:0
[VHDL编程] TestLED2C5
说明:文件中有CPU8051V1.vqm具体使用的例子和CPU8051V1.vqm文件,适用于quartusii软件中对单片机的嵌入练习和使用-CPU8051V1.vqm document specific examples of the use of CPU8051V1.vqm documents, quartusii software for single-chip embedded in the exercises and the us<zhouqing> 在 2025-02-03 上传 | 大小:301kb | 下载:0