[VHDL编程] quartus2

说明：quartus工具入门文档，altera公司官方软件翻译全文。-tool for quartus entry documents, altera company official translation of the full text of the software.
<周洁> 在 2025-01-25 上传 | 大小：2.96mb | 下载：0

[VHDL编程] EDAteaching

说明：系统介绍EDA技术的发展概述，相关概念，VHDL语言、MAX+PULS、QUARTUS的设计方法。-System overview of the development of EDA technology, related concepts, VHDL language, MAX+ PULS, QUARTUS design method.
<李明> 在 2025-01-25 上传 | 大小：13.73mb | 下载：0

[VHDL编程] adaptive_lms_equalizer_latest.tar

说明：In communication systems channel poses an important role. channels can convolve many different kind of distortions to our information. In perticular wireless channels multipath distortion is sevear. and more sevear is
<Arun> 在 2025-01-25 上传 | 大小：14kb | 下载：0

[VHDL编程] hilbert_transformer_latest.tar

说明：The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase detection, etc. It can be formulated as filtering operation which makes it p
<Arun> 在 2025-01-25 上传 | 大小：1.18mb | 下载：0

[VHDL编程] hssdrc_latest.tar

说明：HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in M
<Arun> 在 2025-01-25 上传 | 大小：415kb | 下载：0

[VHDL编程] audio_project

说明：Enhanced Audio Project by Dixie Xue & Wei Zhang -Enhanced Audio Project by Dixie Xue & Wei Zhang
<isoft> 在 2025-01-25 上传 | 大小：1.2mb | 下载：0

[VHDL编程] checkers

说明： VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani - VHDL Checkers Implementation by Ibrahim Elbouchikhi Amir Nader-Tehrani
<isoft> 在 2025-01-25 上传 | 大小：1.28mb | 下载：0

[VHDL编程] GIFImageViewer

说明：vhdl code for GIF Image Viewer
<isoft> 在 2025-01-25 上传 | 大小：184kb | 下载：0

[VHDL编程] vgaoutfiles

说明：vhdl code for obtaining video output through vga port
<isoft> 在 2025-01-25 上传 | 大小：18kb | 下载：0

[VHDL编程] 8051VHDLSource

说明：Toplevel VHDL Structural model of a system containing 8051 -Toplevel VHDL Structural model of a system containing 8051
<isoft> 在 2025-01-25 上传 | 大小：36kb | 下载：0

[VHDL编程] pif2wb_latest.tar

说明：This is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB
<Arun> 在 2025-01-25 上传 | 大小：2.15mb | 下载：0

[VHDL编程] ima_adpcm_encoder_latest.tar

说明：This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA
<Arun> 在 2025-01-25 上传 | 大小：23kb | 下载：0