资源列表
[VHDL编程] Synplify901.crack
说明:高性能综合工具Synplify9.0.1破解文件-High-performance integrated tool Synplify9.0.1 crack file<姚志海> 在 2025-03-03 上传 | 大小:32kb | 下载:0
[VHDL编程] amplifier-4549
说明:用分立元件打造运放,性能超过NE5532\AD827-is easy building Amplifier<cpuos> 在 2025-03-03 上传 | 大小:17kb | 下载:0
[VHDL编程] vhdlcodes
说明:its VHDL coding for full adder and full substractor. 1.Structural model for Half Adder 2.Structural model for Full Adder 3.VHDL code for BEHAVIORAL model of Full Adder 4.VHDL CODE: full substractor (dataflow):<mohankrrishna> 在 2025-03-03 上传 | 大小:1kb | 下载:0
[VHDL编程] vhdlcodes1
说明:vhdl programs for 4 bit ripple carry adder in structural and behavioural modelling<mohankrrishna> 在 2025-03-03 上传 | 大小:1kb | 下载:0
[VHDL编程] vhdlcodes2
说明:VHDL coding for a 4 bit comparator in structural and behavioural modelling.<mohankrrishna> 在 2025-03-03 上传 | 大小:1kb | 下载:0
[VHDL编程] vhdlcodes3
说明:VHDL coding for 2 to 4 decoder in dataflow modelling and for 4 bit parity checker in behavioural and for 3 bit parity generator in behavioural.<mohankrrishna> 在 2025-03-03 上传 | 大小:1kb | 下载:0
[VHDL编程] vhdlcodes4
说明:VHDL coding for 4X1 mux in behavioural modelling and for 16X1 mux in structural modelling.<mohankrrishna> 在 2025-03-03 上传 | 大小:1kb | 下载:0
[VHDL编程] ControllingElevatorbyFPGACode.txt
说明:This code is talk about how to programming FPGA to control Elevator.<N> 在 2025-03-03 上传 | 大小:3kb | 下载:0