[VHDL编程] pci32tlite_oc_latest.tar

说明：pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, T
<shen> 在 2025-03-05 上传 | 大小：7.45mb | 下载：0

[VHDL编程] ldpc_decoder_802_3an_latest.tar

说明：ldpc decoder 802-3an,最新版本,verilog版本.完成基于LDPC解码 -ldpc decoder 802-3an, the latest version, verilog version. LDPC decoder based on the completion
<shen> 在 2025-03-05 上传 | 大小：864kb | 下载：0

[VHDL编程] robot_control_library_latest.tar

说明：robot_control_library,包含documentation,drivers,opb_pid,opb_ps2,stepper_ctrl,等.-robot_control_library, including documentation, drivers, opb_pid, opb_ps2, stepper_ctrl, and so on.
<shen> 在 2025-03-05 上传 | 大小：244kb | 下载：0

[VHDL编程] bluetooth_latest.tar

说明：bluetooth_latest,The aim of this project is to build the bluetooth base band layer. The whole bluetooth hardware and firmware (HCI, controller and LMP) will be implemented in separate project.-bluetooth_latest, The aim o
<shen> 在 2025-03-05 上传 | 大小：1.76mb | 下载：0

[VHDL编程] z80control_latest.tar

说明：z80控制器,内部包含VHDL源代码,FOF文件,基于USB借口的设计实例等.-z80 controller contains the VHDL source code inside, FOF files, USB-based design example of such an excuse.
<shen> 在 2025-03-05 上传 | 大小：2.51mb | 下载：0

[VHDL编程] dvbt_core_latest.tar

说明：The present document describes a baseline transmission system for digital terrestrial TeleVision (TV) broadcasting. It specifies the channel coding/modulation system intended for digital multi-programme LDTV/SDTV/EDTV
<shen> 在 2025-03-05 上传 | 大小：9.42mb | 下载：0

[VHDL编程] cache

说明：本文给出了一个cache的所有源代码，存为txt格式的压缩包-this is a code of a cache
<张的的> 在 2025-03-05 上传 | 大小：1kb | 下载：1

[VHDL编程] attachments_05_10_2010

说明：VHDL program for basic gates
<sudhakar> 在 2025-03-05 上传 | 大小：40kb | 下载：0

[VHDL编程] fir

说明：FPGA实现的FIR滤波器，很好的参考资料！-FPGA implementation of FIR filters, a very good reference!
<吴锦干> 在 2025-03-05 上传 | 大小：383kb | 下载：0

[VHDL编程] Oscilloscope

说明：The design is designed partly in VHDL, partly in schematic drawings and targets a Xilinx Spartan-2E FPGA. However, since the design was tailored specifically for the aforementioned boards it is highly unlikely that it ca
<sami> 在 2025-03-05 上传 | 大小：1.77mb | 下载：0

[VHDL编程] four_bit_addersubtractor

说明：Verilog code for 4 bit Adder/Subtructor
<qt> 在 2025-03-05 上传 | 大小：1kb | 下载：0

[VHDL编程] HDB3

说明：HDB3编解码过程，本代码用vhdl语言书写，重现了HDB3编解码的详细过程。相信对广大写硬件语言的朋友有好处-HDB3 code and decode
<yuandingbo> 在 2025-03-05 上传 | 大小：1kb | 下载：0