搜索资源列表
标准SDR SDRAM控制器参考设计_verilog_lattice
- 标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
ref-sdr-sdram-vhdl
- 标准SDR SDRAM控制器参考设计_verilog_lattice\\sdr_ctrl.v
SDR
- 软件无线电SDR实现GPS的代码,软件无线电SDR实现GPS的代码
SDR-SDRAM-vhdl
- SDR-SDRAM-vhdl单个SDRAM的控制，通过它可以学习了解SDRAM的时序等，很有帮助哦 ！
标准SDR SDRAM控制器参考设计_verilog_lattice
- 标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
sdr sdram controller
- ALTERA sdram vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
ref-sdr-sdram-verilog
- 本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
SDR4G
- 浅谈软件无线电技术SDR及其在未来移动通信4G中的应用-SDR software radio technology and the future of mobile communications in the application of 4G
soft_radio_init
- 软件无线电SDR的仿真，使用matlab仿真。-Software Radio SDR simulation using Matlab simulation.
leon3-altera-ep2s60-sdr
- ahb sdram interface.arm cpu series,include controller
SDR_4Mx16_HY57V641620HG_verilogl
- Hynix公司8M byte sdr sdram的verilog语言仿真实现。-Hynix company 8M byte sdr sdram realize the Verilog simulation language.
ref-sdr-sdram-vhdl
- 标准SDR SDRAM控制器参考设计_verilog_lattice\sdr_ctrl.v-Standard SDR SDRAM Controller Reference Design _verilog_latticesdr_ctrl.v
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
SDR
- Its a simple SDR to change modulation schemes
SDR
- FPGA based implementation of a SDR - codes in Verilog HDL for the processor and control.-FPGA based implementation of a SDR- codes in Verilog HDL for the processor and control.
SDR-SDRAM-ctl1
- SDR SDRAM控制器，FPGA vhdl代码-SDR SDRAM Controller
gps-sdr-gps-sdr-271efd1
- The GPS-SDR is a highly modular, multithreaded enabled, C++ application. The software is a GPS L1 C/A code receiver with a fast acquisition/weak signal capability.
sdr-sdram-(verilog)
- Altera的SDR SDRAM模型，verilog实现，带说明书文件以及仿真文件、SDRAM原型文件。-Altera' s SDR SDRAM model, verilog implementation, with manual files and simulation files, SDRAM prototype file.
标准SDR SDRAM控制器参考设计，Lattice提供
- 说明： SDR SDRAM 控制器 来自lattice 已经分析代码可用!大家可以参考修改，形成自己的实例(Descr iption: SDR SDRAM controller from lattice has been analyzed code available, we can refer to modify, to form their own examples)
gnss sdr
- Gnss SDR details in c and c++