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iiitAccessServer
- iiitAccessServer是一个用Java编写的基于规则的企业鉴别系统。它作为一个服务器工作，能够用于可以打开一个socket的任何编程语言。服务器从LDAP取回它的数据，将它按优化过的格式保存在一个或多个MySQL数据库，用作一个执久的二级缓存以取得高性能。整个系统设计为可扩展的和容错的.zip-iiitAccessServer Java is a preparation of the rules-based enterpris
CacheSetSource
- CacheSet is an applet that allows you to manipulate the working-set parameters of the system file cache. Unlike CacheMan, CacheSet runs on all versions of NT and will work without modifications on new Service Pack releas
ClearCache
- 清空IE浏览器的缓存，防止Cache数据，从而造成页面不刷新-emptied IE browser cache to prevent data cache, resulting in pages not updated
komssys-0.3.6.tar
- The KOM(S) Streaming System provides a server, a client, and a proxy cache for audio/video streaming. The first and foremost encoding format that we use is MPEG-1 System. The primary platforms is Linux. It does not
cache_521
- 高速缓存算法类.英文介绍: The Cache class implements a simple caching mechanism with "least recently used" (LRU) replacement. It is useful for cases in which you have some memory to spare and you wish to speed up access to
NRS4000_cpu
- 现代先进微处理器有非常高的集成度和复杂度，又有寄存器堆、Cache等嵌入式部件，而且芯片管脚数相对较少，必须要有一定的自测试设计和其它的可测试性设计来简化测试代码，提高故障覆盖率。本文简要讨论NRS4000微处理器芯片的以边界扫描测试为主体，以自测试为补充的可测试性设计框架。着重介绍芯片的边界扫描设计和芯片中译码控制器PLA和微程序ＲＯＭ以及采用内嵌RAM结构的指令Cache和寄存器堆的内建自测试设计。仿真结果表明，这些可测试性设计大大
Cache_FIFO
- 模拟内存高速缓存技术C源码，主要是FIFO形式。-simulated high-speed cache memory technology C source code, is the main form of FIFO.
icache
- 模拟指令cache的访问过程，包括命中和失效等操作过程，很有用的东西。-simulation instruction cache in the course of the visit, including hits such as the failure to operate and process useful things.
cache
- 原创VERILOG HDL 实现CACHE的操作，有需要请下载-original verilog HDL achieve CACHE operation, the need to download
cache4j_0.4_src
- cache4j是一个有简单API与实现快速的Java对象缓存。它的特性包括：在内存中进行缓存，设计用于多线程环境，两种实现：同步与阻塞，多种缓存清除策略：LFU, LRU, FIFO，可使用强引用(strong reference)与软引用(soft reference)存储对象。-cache4j is a simple API and achieving rapid Java Object Cache. Its features in
riscmcu
- 精简CPU设计，需要的可以下来看看,是VERILOG语言写的-streamlined CPU design, the need to be down look at the language is written in verilog
dm-cache.c
- dm-cache 主要用在存储技术里面,可以大大加快 磁盘的读写速度 ,主要与iscsi-target 一起使用-dm-cache mainly used in storage technology which can greatly speed up disk reading and writing speed, primarily to use iscsi-target
CACHE
- 教你如何使用上s3c2410的cache功能，很详细-Teach you how to use the cache on the S3C2410 features, in great detail
cache
- 实现LRU算法的Cache源代码，可以用来支持整个系统中某种对象数量的个数限制，同时，通过LRU算法保证使用频度高的对象尽可能的驻留内存。 该算法可以用来支持J2EE系统性能提升，同时又可以控制内存安全使用。-LRU algorithm implementation Cache source code, can be used to support the system as a whole number of objects in
cache
- The cache manager source code implemented in Windows kernel.
cache
- 这是一个安全的数据缓冲去,当数据存储到缓冲区后,即使出现异常情况, 数据也不会丢失. 同时还提供了ini文件读取和修改的API. -cache data but it can restore information in cache while error
cache
- 缓存设计详解,对缓存在web应用上的设计做了比较全面的阐述.-Cache design Xiangjie, to the cache in the design of web applications have done a more comprehensive elaboration.
cache
- （1）FIFO：First In First Out，先进先出 （2）LRU：Least Recently Used，最近最少使用 （3）LFU：Least Frequently Used，最不经常使用-（1）FIFO：First In First Out （2）LRU：Least Recently Used （3）LFU：Least Frequently Used
cache
- 实现cache替换算法，思路是改进的LRU和LFU算法，在一定程度上提高了原来的LRU算法的命中率。-Achieve cache replacement algorithm, idea is to improve the LRU and LFU algorithms, to a certain extent, the original LRU algorithm to improve the hit rate.
Memory
- Memory Hierarchy in Cache-Based System