文件名称:8.10
介绍说明－－下载内容均来自于网络，请自行研究使用
强烈推荐下载,verilog状态机实例.可以在modelsim下运行.
-strongly recommend downloading Verilog state machine example. In modelsim running.
-strongly recommend downloading Verilog state machine example. In modelsim running.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
压缩包 : 774336408.10.rar 列表 8.10\work\_info 8.10\work\dflop\_primary.vhd 8.10\work\dflop\verilog.asm 8.10\work\dflop\_primary.dat 8.10\work\dflop 8.10\work\shifter\_primary.vhd 8.10\work\shifter\verilog.asm 8.10\work\shifter\_primary.dat 8.10\work\shifter 8.10\work\test\_primary.vhd 8.10\work\test\verilog.asm 8.10\work\test\_primary.dat 8.10\work\test 8.10\work 8.10\vsim.wlf 8.10\dflop.cr.mti 8.10\dflop.mpf 8.10\dflop.v 8.10\dflop.v.bak 8.10\test.v 8.10\test.v.bak 8.10