文件名称:spi_master
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用verilog编写的SPI代码，这个代码是FPGA作为主机可以发送和读取数据，上板验证过，我测试的时候SPI的CLK速率是5M，读写都没问题，稳，至于更高的速率没测试过。
下面鬼畜的百度翻译大家就不要看了，我不知道他想表达啥意思～(SPI code written in Verilog, the code is FPGA as the host can send and read data, the upper board verified, when I test the SPI CLK rate is 5M, read and write no problem, stable, as for higher rates have not been tested)
下面鬼畜的百度翻译大家就不要看了，我不知道他想表达啥意思～(SPI code written in Verilog, the code is FPGA as the host can send and read data, the upper board verified, when I test the SPI CLK rate is 5M, read and write no problem, stable, as for higher rates have not been tested)
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下载文件列表
| 文件名 | 大小 | 更新时间 |
|---|---|---|
| spi_master.v | 4000 | 2018-03-26 |