文件名称:ddr_sdram
介绍说明--下载内容均来自于网络,请自行研究使用
包含ddr_sdr_conf_pkg.vhd,reset.vhd,ddr_dcm.vhd,user_if.vhd,ddr_sdram.vhd,Mt46v16m16.vhd以及仿真TB文件;设计采用Virtex ii系列芯片,DDR_SDRAM型号为Mt46v16m16,可用于进行DDR控制的初步学习使用;通过细致了解并进行逻辑控制,可深入理解DDR芯片内部构造;
支持133MHz系统时钟频率,突发长度为2,可进行读、写、NOP、激活、自刷新配置、预充电以及各ROW/BANK的激活改变等动作,较适合DDR入门使用(Including the ddr_sdr_conf_pkg.vhd, reset.vhd, ddr_dcm.vhd, user_if.vhd, ddr_sdram.vhd, Mt46v16m16.vhd and simulation TB files; designed with Virtex ii series chips, DDR_SDRAM model for the Mt46v16m16, can be used for initial control of DDR control ; Through careful understanding and logic control, in-depth understanding of DDR chip internal structure;
Support 133MHz system clock frequency, burst length of 2, can be read, write, NOP, activation, self-refresh configuration, pre-charge and the activation of the ROW / BANK change action, more suitable for DDR entry)
支持133MHz系统时钟频率,突发长度为2,可进行读、写、NOP、激活、自刷新配置、预充电以及各ROW/BANK的激活改变等动作,较适合DDR入门使用(Including the ddr_sdr_conf_pkg.vhd, reset.vhd, ddr_dcm.vhd, user_if.vhd, ddr_sdram.vhd, Mt46v16m16.vhd and simulation TB files; designed with Virtex ii series chips, DDR_SDRAM model for the Mt46v16m16, can be used for initial control of DDR control ; Through careful understanding and logic control, in-depth understanding of DDR chip internal structure;
Support 133MHz system clock frequency, burst length of 2, can be read, write, NOP, activation, self-refresh configuration, pre-charge and the activation of the ROW / BANK change action, more suitable for DDR entry)
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ddr_sdram\ddr_dcm.vhd
ddr_sdram\ddr_sdr.vhd
ddr_sdram\ddr_sdr_conf_pkg.vhd
ddr_sdram\mt46v16m16.vhd
ddr_sdram\reset.vhd
ddr_sdram\tb.vhd
ddr_sdram\user_if.vhd
ddr_sdram
ddr_sdram\ddr_sdr.vhd
ddr_sdram\ddr_sdr_conf_pkg.vhd
ddr_sdram\mt46v16m16.vhd
ddr_sdram\reset.vhd
ddr_sdram\tb.vhd
ddr_sdram\user_if.vhd
ddr_sdram