文件名称:clock_sel

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2017-07-20
  • 文件大小:
  • 15.62mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • xiaoq*****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

无毛刺多时钟选择,可根据不同模式选择不同时钟(Multi clock selection, different modes can be selected according to different clock)
相关搜索: 多时钟选择

(系统自动生成,下载前可以参看下载内容)

下载文件列表

clock_sel\acq_engine.v

clock_sel\acq_inc.v

clock_sel\c5_pin_model_dump.txt

clock_sel\clk_sel.v

clock_sel\clk_sel.v.bak

clock_sel\db\logic_util_heursitic.dat

clock_sel\db\prev_cmp_test_selectclk.qmsg

clock_sel\db\test_selectclk.asm.qmsg

clock_sel\db\test_selectclk.asm.rdb

clock_sel\db\test_selectclk.cbx.xml

clock_sel\db\test_selectclk.cmp.bpm

clock_sel\db\test_selectclk.cmp.cdb

clock_sel\db\test_selectclk.cmp.hdb

clock_sel\db\test_selectclk.cmp.idb

clock_sel\db\test_selectclk.cmp.kpt

clock_sel\db\test_selectclk.cmp.logdb

clock_sel\db\test_selectclk.cmp.rdb

clock_sel\db\test_selectclk.cmp_merge.kpt

clock_sel\db\test_selectclk.cyclonev_io_sim_cache.ff_100c_fast.hsd

clock_sel\db\test_selectclk.cyclonev_io_sim_cache.ff_n40c_fast.hsd

clock_sel\db\test_selectclk.cyclonev_io_sim_cache.ii_100c_slow.hsd

clock_sel\db\test_selectclk.cyclonev_io_sim_cache.ii_85c_slow.hsd

clock_sel\db\test_selectclk.cyclonev_io_sim_cache.ii_n40c_slow.hsd

clock_sel\db\test_selectclk.db_info

clock_sel\db\test_selectclk.eda.qmsg

clock_sel\db\test_selectclk.fit.qmsg

clock_sel\db\test_selectclk.hier_info

clock_sel\db\test_selectclk.hif

clock_sel\db\test_selectclk.ipinfo

clock_sel\db\test_selectclk.lpc.html

clock_sel\db\test_selectclk.lpc.rdb

clock_sel\db\test_selectclk.lpc.txt

clock_sel\db\test_selectclk.map.ammdb

clock_sel\db\test_selectclk.map.bpm

clock_sel\db\test_selectclk.map.cdb

clock_sel\db\test_selectclk.map.hdb

clock_sel\db\test_selectclk.map.kpt

clock_sel\db\test_selectclk.map.logdb

clock_sel\db\test_selectclk.map.qmsg

clock_sel\db\test_selectclk.map.rdb

clock_sel\db\test_selectclk.map_bb.cdb

clock_sel\db\test_selectclk.map_bb.hdb

clock_sel\db\test_selectclk.map_bb.logdb

clock_sel\db\test_selectclk.pre_map.hdb

clock_sel\db\test_selectclk.pti_db_list.ddb

clock_sel\db\test_selectclk.root_partition.map.reg_db.cdb

clock_sel\db\test_selectclk.routing.rdb

clock_sel\db\test_selectclk.rtlv.hdb

clock_sel\db\test_selectclk.rtlv_sg.cdb

clock_sel\db\test_selectclk.rtlv_sg_swap.cdb

clock_sel\db\test_selectclk.sld_design_entry.sci

clock_sel\db\test_selectclk.sld_design_entry_dsc.sci

clock_sel\db\test_selectclk.smart_action.txt

clock_sel\db\test_selectclk.sta.qmsg

clock_sel\db\test_selectclk.sta.rdb

clock_sel\db\test_selectclk.sta_cmp.7_slow_1100mv_100c.tdb

clock_sel\db\test_selectclk.syn_hier_info

clock_sel\db\test_selectclk.tiscmp.fastest_slow_1100mv_85c.ddb

clock_sel\db\test_selectclk.tiscmp.fastest_slow_1100mv_n40c.ddb

clock_sel\db\test_selectclk.tiscmp.fast_1100mv_100c.ddb

clock_sel\db\test_selectclk.tiscmp.fast_1100mv_n40c.ddb

clock_sel\db\test_selectclk.tiscmp.slow_1100mv_100c.ddb

clock_sel\db\test_selectclk.tiscmp.slow_1100mv_n40c.ddb

clock_sel\db\test_selectclk.tis_db_list.ddb

clock_sel\db\test_selectclk.vpr.ammdb

clock_sel\hc_output\test_selectclk.names_drv_tbl

clock_sel\incremental_db\compiled_partitions\test_selectclk.db_info

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.ammdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.cdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.dfp

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.hbdb.cdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.hbdb.hdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.hbdb.sig

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.hdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.kpt

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.logdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.cmp.rcfdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.cdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.dpi

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.hbdb.cdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.hbdb.hb_info

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.hbdb.hdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.hbdb.sig

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.hdb

clock_sel\incremental_db\compiled_partitions\test_selectclk.root_partition.map.kpt

clock_sel\incremental_db\README

clock_sel\output_files\test_selectclk.asm.rpt

clock_sel\output_files\test_selectclk.done

clock_sel\output_files\test_selectclk.eda.rpt

clock_sel\output_files\test_selectclk.fit.rpt

clock_sel\output_files\test_selectclk.fit.smsg

clock_sel\output_files\test_selectclk.fit.summary

clock_sel\output_files\test_selectclk.flow.rpt

clock_sel\output_files\test_selectclk.jdi

clock_sel\output_files\test_selectclk.map.rpt

clock_sel\output_files\test_selectclk.map.summary

clock_sel\output_files\test_selectclk.pin

clock_sel\output_files\test_selectclk.sof

clock_sel\output_files\test_selectclk.sta.rpt

clock_sel\output_files\test_selectclk.sta.summary

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