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文件名称:MCPU

  • 所属分类：
  • VHDL编程
  • 资源属性：
  • [MacOS] [VHDL] [源码]
  • 上传时间：
  • 2017-07-12
  • 文件大小：
  • 5.6mb
  • 下载次数：
  • 0次
  • 提 供 者：
  • Lsin****
  • 相关连接：
  • 无
  • 下载说明：
  • 别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容均来自于网络，请自行研究使用

多周期CPU的verilog代码，用vivado可以仿真出波形(multi-cycle CPU by verilog and using vivado to simulate.)
相关搜索： cpu
vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

MCPU

MCPU\.DS_Store

__MACOSX

__MACOSX\MCPU

__MACOSX\MCPU\._.DS_Store

MCPU\dfdfj

MCPU\dfdfj\.DS_Store

__MACOSX\MCPU\dfdfj

__MACOSX\MCPU\dfdfj\._.DS_Store

MCPU\dfdfj\MCPU

MCPU\dfdfj\MCPU\.DS_Store

__MACOSX\MCPU\dfdfj\MCPU

__MACOSX\MCPU\dfdfj\MCPU\._.DS_Store

MCPU\dfdfj\MCPU\MCPU

MCPU\dfdfj\MCPU\MCPU\.DS_Store

__MACOSX\MCPU\dfdfj\MCPU\MCPU

__MACOSX\MCPU\dfdfj\MCPU\MCPU\._.DS_Store

MCPU\dfdfj\MCPU\MCPU\.Xil

MCPU\dfdfj\MCPU\MCPU\.Xil\Vivado-9488-DESKTOP-JGB0NGV

MCPU\dfdfj\MCPU\MCPU\instruct.txt

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\.DS_Store

__MACOSX\MCPU\dfdfj\MCPU\MCPU\MCPU.srcs

__MACOSX\MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\._.DS_Store

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sim_1

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sim_1\new

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sim_1\new\test.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\.DS_Store

__MACOSX\MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1

__MACOSX\MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\._.DS_Store

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\ALU.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Control_Unit.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Data_MEM.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\DATAREG.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Dflipflop.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Ins_Mem.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\IR.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\MCPU.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Multiplexer2_32.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Multiplexer4_32.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Mutiplexer3_5.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\PC.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\pc4_concate_addr.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\PC_add4.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\PC_add_imme.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\Regfile.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\sign_extend.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\SignalGenerate.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\sources_1\new\State_trans.v

MCPU\dfdfj\MCPU\MCPU\MCPU.srcs\test_behav.wcfg

MCPU\dfdfj\MCPU\MCPU\vivado_11216.backup.jou

MCPU\dfdfj\MCPU\MCPU\vivado_11216.backup.log

MCPU\dfdfj\MCPU\MCPU\vivado_2548.backup.jou

MCPU\dfdfj\MCPU\MCPU\vivado_2548.backup.log

MCPU\dfdfj\MCPU\MCPU\vivado_2720.backup.jou

MCPU\dfdfj\MCPU\MCPU\vivado_2720.backup.log

MCPU\dfdfj\MCPU\MCPU\vivado_7984.backup.jou

MCPU\dfdfj\MCPU\MCPU\vivado_8348.backup.jou

MCPU\dfdfj\MCPU\MCPU\vivado_8348.backup.log

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib\activehdl

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib\ies

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib\modelsim

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib\questa

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib\riviera

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\compile_simlib\vcs

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt\gui_resources.wdf

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt\java_command_handlers.wdf

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt\project.wpc

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt\synthesis.wdf

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt\webtalk_pa.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.cache\wt\xsim.wdf

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.hw

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.hw\多周期CPU_MCPU.lpr

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.ip_user_files

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.ip_user_files\README.txt

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_1.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_2.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_3.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_4.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_5.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_6.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_7.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_8.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\.jobs\vrs_config_9.xml

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\impl_1

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.vivado.begin.rst

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.vivado.error.rst

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.Vivado_Synthesis.queue.rst

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.Xil

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.Xil\Vivado-9232-DESKTOP-JGB0NGV

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.Xil\Vivado-9232-DESKTOP-JGB0NGV\.lpr

MCPU\dfdfj\MCPU\MCPU\多周期CPU_MCPU.runs\synth_1\.Xil\Vivado-9232-DESKTOP-JGB0NGV\realtime

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