文件名称:kehshechenxu
介绍说明－－下载内容均来自于网络，请自行研究使用
编制一全双工UART电路，通过试验箱MAX202E转换成RS232电平，与计算机进行通讯实验，设置8个按键，按键值为ASIC码“1”~“8”，通过串口发送给计算机，在计算机上显示键值，同时在数码管最高位显示；计算机可发送“0”~“F”的ASIC码，FPGA接收后在数码管低位显示0~F。通过按键可设置波特率。
要求：波特率为三种 1200、2400、9600，由1个按键选择，3个LED分别指示；
数据格式为1位起始位、8位数据位和一位停止位；
上位计算机发送接收软件可使用“串口调试器“软件；
发送和接收数据时，由两个LED分别指示。
发挥：自动回发功能、接收到特殊字符（自定义）自动更改波特率。(A full duplex UART circuit, converted into RS232 level by MAX202E test box, communication experiment with computer, set of 8 buttons, keys for ASIC code "1" to "8", to the computer through the serial port to send and display keys on the computer, at the same time in the digital tube display high computer can send "; 0" to "F" in the ASIC code, FPGA after receiving the digital tube display low 0~F. You can set the baud rate by the button.
Requirements: baud rate for three, 1200, 2400, 9600, selected by 1 buttons, 3 LED, respectively;
The data format consists of 1 bit start bits, 8 bit data bits, and one stop bit;
The upper computer sends and receives the software, and the serial debugger can be used;
When sending and receiving data, instructions are given by two LED respectively.
Play: Auto postback function, receive special characters (custom), change baud rate automatically.)
要求：波特率为三种 1200、2400、9600，由1个按键选择，3个LED分别指示；
数据格式为1位起始位、8位数据位和一位停止位；
上位计算机发送接收软件可使用“串口调试器“软件；
发送和接收数据时，由两个LED分别指示。
发挥：自动回发功能、接收到特殊字符（自定义）自动更改波特率。(A full duplex UART circuit, converted into RS232 level by MAX202E test box, communication experiment with computer, set of 8 buttons, keys for ASIC code "1" to "8", to the computer through the serial port to send and display keys on the computer, at the same time in the digital tube display high computer can send "; 0" to "F" in the ASIC code, FPGA after receiving the digital tube display low 0~F. You can set the baud rate by the button.
Requirements: baud rate for three, 1200, 2400, 9600, selected by 1 buttons, 3 LED, respectively;
The data format consists of 1 bit start bits, 8 bit data bits, and one stop bit;
The upper computer sends and receives the software, and the serial debugger can be used;
When sending and receiving data, instructions are given by two LED respectively.
Play: Auto postback function, receive special characters (custom), change baud rate automatically.)
相关搜索： vhdl串口通信
(系统自动生成,下载前可以参看下载内容)
下载文件列表
kehshechenxu\clock.qpf
kehshechenxu\clock.qsf
kehshechenxu\clock.qws
kehshechenxu\clock.tis_db_list.ddb
kehshechenxu\clock.vhd
kehshechenxu\clock.vhd.bak
kehshechenxu\db\.cmp.kpt
kehshechenxu\db\clock.ace_cmp.bpm
kehshechenxu\db\clock.ace_cmp.cdb
kehshechenxu\db\clock.ace_cmp.hdb
kehshechenxu\db\clock.acvq.rdb
kehshechenxu\db\clock.asm.qmsg
kehshechenxu\db\clock.asm.rdb
kehshechenxu\db\clock.asm_labs.ddb
kehshechenxu\db\clock.cbx.xml
kehshechenxu\db\clock.cmp.bpm
kehshechenxu\db\clock.cmp.cdb
kehshechenxu\db\clock.cmp.hdb
kehshechenxu\db\clock.cmp.idb
kehshechenxu\db\clock.cmp.logdb
kehshechenxu\db\clock.cmp.rdb
kehshechenxu\db\clock.cmp_merge.kpt
kehshechenxu\db\clock.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
kehshechenxu\db\clock.cycloneive_io_sim_cache.31um_tt_1200mv_0c_slow.hsd
kehshechenxu\db\clock.cycloneive_io_sim_cache.31um_tt_1200mv_85c_slow.hsd
kehshechenxu\db\clock.db_info
kehshechenxu\db\clock.eco.cdb
kehshechenxu\db\clock.fit.qmsg
kehshechenxu\db\clock.hier_info
kehshechenxu\db\clock.hif
kehshechenxu\db\clock.logic_util_heuristic.dat
kehshechenxu\db\clock.lpc.html
kehshechenxu\db\clock.lpc.rdb
kehshechenxu\db\clock.lpc.txt
kehshechenxu\db\clock.map.ammdb
kehshechenxu\db\clock.map.bpm
kehshechenxu\db\clock.map.cdb
kehshechenxu\db\clock.map.hdb
kehshechenxu\db\clock.map.kpt
kehshechenxu\db\clock.map.logdb
kehshechenxu\db\clock.map.qmsg
kehshechenxu\db\clock.map.rdb
kehshechenxu\db\clock.map_bb.cdb
kehshechenxu\db\clock.map_bb.hdb
kehshechenxu\db\clock.map_bb.logdb
kehshechenxu\db\clock.pplq.rdb
kehshechenxu\db\clock.pre_map.hdb
kehshechenxu\db\clock.pti_db_list.ddb
kehshechenxu\db\clock.root_partition.map.reg_db.cdb
kehshechenxu\db\clock.routing.rdb
kehshechenxu\db\clock.rtlv.hdb
kehshechenxu\db\clock.rtlv_sg.cdb
kehshechenxu\db\clock.rtlv_sg_swap.cdb
kehshechenxu\db\clock.sld_design_entry.sci
kehshechenxu\db\clock.sld_design_entry_dsc.sci
kehshechenxu\db\clock.smart_action.txt
kehshechenxu\db\clock.sta.qmsg
kehshechenxu\db\clock.sta.rdb
kehshechenxu\db\clock.sta_cmp.6_slow_1200mv_85c.tdb
kehshechenxu\db\clock.tiscmp.fast_1200mv_0c.ddb
kehshechenxu\db\clock.tiscmp.slow_1200mv_0c.ddb
kehshechenxu\db\clock.tiscmp.slow_1200mv_85c.ddb
kehshechenxu\db\clock.tis_db_list.ddb
kehshechenxu\db\clock.vpr.ammdb
kehshechenxu\db\prev_cmp_clock.qmsg
kehshechenxu\incremental_db\compiled_partitions\clock.db_info
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.ammdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.cdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.dfp
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.hdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.logdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.rcfdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.cdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.dpi
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.cdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.hb_info
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.hdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.sig
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.kpt
kehshechenxu\incremental_db\compiled_partitions\clock.rrp.hdb
kehshechenxu\incremental_db\README
kehshechenxu\output_files\clock.asm.rpt
kehshechenxu\output_files\clock.done
kehshechenxu\output_files\clock.fit.rpt
kehshechenxu\output_files\clock.fit.smsg
kehshechenxu\output_files\clock.fit.summary
kehshechenxu\output_files\clock.flow.rpt
kehshechenxu\output_files\clock.jdi
kehshechenxu\output_files\clock.map.rpt
kehshechenxu\output_files\clock.map.summary
kehshechenxu\output_files\clock.pin
kehshechenxu\output_files\clock.sld
kehshechenxu\output_files\clock.sof
kehshechenxu\output_files\clock.sta.rpt
kehshechenxu\output_files\clock.sta.summary
kehshechenxu\rcvr.vhd
kehshechenxu\rcvr.vhd.bak
kehshechenxu\txmit.vhd
kehshechenxu\txmit.vhd.bak
kehshechenxu\clock.qsf
kehshechenxu\clock.qws
kehshechenxu\clock.tis_db_list.ddb
kehshechenxu\clock.vhd
kehshechenxu\clock.vhd.bak
kehshechenxu\db\.cmp.kpt
kehshechenxu\db\clock.ace_cmp.bpm
kehshechenxu\db\clock.ace_cmp.cdb
kehshechenxu\db\clock.ace_cmp.hdb
kehshechenxu\db\clock.acvq.rdb
kehshechenxu\db\clock.asm.qmsg
kehshechenxu\db\clock.asm.rdb
kehshechenxu\db\clock.asm_labs.ddb
kehshechenxu\db\clock.cbx.xml
kehshechenxu\db\clock.cmp.bpm
kehshechenxu\db\clock.cmp.cdb
kehshechenxu\db\clock.cmp.hdb
kehshechenxu\db\clock.cmp.idb
kehshechenxu\db\clock.cmp.logdb
kehshechenxu\db\clock.cmp.rdb
kehshechenxu\db\clock.cmp_merge.kpt
kehshechenxu\db\clock.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
kehshechenxu\db\clock.cycloneive_io_sim_cache.31um_tt_1200mv_0c_slow.hsd
kehshechenxu\db\clock.cycloneive_io_sim_cache.31um_tt_1200mv_85c_slow.hsd
kehshechenxu\db\clock.db_info
kehshechenxu\db\clock.eco.cdb
kehshechenxu\db\clock.fit.qmsg
kehshechenxu\db\clock.hier_info
kehshechenxu\db\clock.hif
kehshechenxu\db\clock.logic_util_heuristic.dat
kehshechenxu\db\clock.lpc.html
kehshechenxu\db\clock.lpc.rdb
kehshechenxu\db\clock.lpc.txt
kehshechenxu\db\clock.map.ammdb
kehshechenxu\db\clock.map.bpm
kehshechenxu\db\clock.map.cdb
kehshechenxu\db\clock.map.hdb
kehshechenxu\db\clock.map.kpt
kehshechenxu\db\clock.map.logdb
kehshechenxu\db\clock.map.qmsg
kehshechenxu\db\clock.map.rdb
kehshechenxu\db\clock.map_bb.cdb
kehshechenxu\db\clock.map_bb.hdb
kehshechenxu\db\clock.map_bb.logdb
kehshechenxu\db\clock.pplq.rdb
kehshechenxu\db\clock.pre_map.hdb
kehshechenxu\db\clock.pti_db_list.ddb
kehshechenxu\db\clock.root_partition.map.reg_db.cdb
kehshechenxu\db\clock.routing.rdb
kehshechenxu\db\clock.rtlv.hdb
kehshechenxu\db\clock.rtlv_sg.cdb
kehshechenxu\db\clock.rtlv_sg_swap.cdb
kehshechenxu\db\clock.sld_design_entry.sci
kehshechenxu\db\clock.sld_design_entry_dsc.sci
kehshechenxu\db\clock.smart_action.txt
kehshechenxu\db\clock.sta.qmsg
kehshechenxu\db\clock.sta.rdb
kehshechenxu\db\clock.sta_cmp.6_slow_1200mv_85c.tdb
kehshechenxu\db\clock.tiscmp.fast_1200mv_0c.ddb
kehshechenxu\db\clock.tiscmp.slow_1200mv_0c.ddb
kehshechenxu\db\clock.tiscmp.slow_1200mv_85c.ddb
kehshechenxu\db\clock.tis_db_list.ddb
kehshechenxu\db\clock.vpr.ammdb
kehshechenxu\db\prev_cmp_clock.qmsg
kehshechenxu\incremental_db\compiled_partitions\clock.db_info
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.ammdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.cdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.dfp
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.hdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.logdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.cmp.rcfdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.cdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.dpi
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.cdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.hb_info
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.hdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hbdb.sig
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.hdb
kehshechenxu\incremental_db\compiled_partitions\clock.root_partition.map.kpt
kehshechenxu\incremental_db\compiled_partitions\clock.rrp.hdb
kehshechenxu\incremental_db\README
kehshechenxu\output_files\clock.asm.rpt
kehshechenxu\output_files\clock.done
kehshechenxu\output_files\clock.fit.rpt
kehshechenxu\output_files\clock.fit.smsg
kehshechenxu\output_files\clock.fit.summary
kehshechenxu\output_files\clock.flow.rpt
kehshechenxu\output_files\clock.jdi
kehshechenxu\output_files\clock.map.rpt
kehshechenxu\output_files\clock.map.summary
kehshechenxu\output_files\clock.pin
kehshechenxu\output_files\clock.sld
kehshechenxu\output_files\clock.sof
kehshechenxu\output_files\clock.sta.rpt
kehshechenxu\output_files\clock.sta.summary
kehshechenxu\rcvr.vhd
kehshechenxu\rcvr.vhd.bak
kehshechenxu\txmit.vhd
kehshechenxu\txmit.vhd.bak