文件名称:PipelineCPU

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2017-05-20
  • 文件大小:
  • 3.38mb
  • 下载次数:
  • 1次
  • 提 供 者:
  • 刘**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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一个用Verilog HDL语言所写的32位MIPS指令系统流水线CPU,含代码工程文件和相关设计说明文档,比较详细。-verilog HDL, 32 MIPS pipeline CPU
(系统自动生成,下载前可以参看下载内容)

下载文件列表





PipelineCPU\29组流水线CPU设计.docx

...........\PipelineCPU\ALU.v

...........\...........\ALU.v.bak

...........\...........\data.mif

...........\...........\DataMemory.v

...........\...........\DataMemory.v.bak

...........\...........\db\altsyncram_7t61.tdf

...........\...........\..\altsyncram_99e1.tdf

...........\...........\..\altsyncram_dkd1.tdf

...........\...........\..\altsyncram_pqq1.tdf

...........\...........\..\mux_ioc.tdf

...........\...........\..\mux_joc.tdf

...........\...........\..\mux_s4d.tdf

...........\...........\..\mux_t4d.tdf

...........\...........\..\mux_umc.tdf

...........\...........\..\PipelineCPU.asm.qmsg

...........\...........\..\PipelineCPU.asm_labs.ddb

...........\...........\..\PipelineCPU.cbx.xml

...........\...........\..\PipelineCPU.cmp.bpm

...........\...........\..\PipelineCPU.cmp.cdb

...........\...........\..\PipelineCPU.cmp.ecobp

...........\...........\..\PipelineCPU.cmp.hdb

...........\...........\..\PipelineCPU.cmp.kpt

...........\...........\..\PipelineCPU.cmp.logdb

...........\...........\..\PipelineCPU.cmp.rdb

...........\...........\..\PipelineCPU.cmp.tdb

...........\...........\..\PipelineCPU.cmp0.ddb

...........\...........\..\PipelineCPU.cmp_merge.kpt

...........\...........\..\PipelineCPU.db_info

...........\...........\..\PipelineCPU.eco.cdb

...........\...........\..\PipelineCPU.eds_overflow

...........\...........\..\PipelineCPU.fit.qmsg

...........\...........\..\PipelineCPU.fnsim.cdb

...........\...........\..\PipelineCPU.fnsim.hdb

...........\...........\..\PipelineCPU.fnsim.qmsg

...........\...........\..\PipelineCPU.hier_info

...........\...........\..\PipelineCPU.hif

...........\...........\..\PipelineCPU.lfp.cdb

...........\...........\..\PipelineCPU.lpc.html

...........\...........\..\PipelineCPU.lpc.rdb

...........\...........\..\PipelineCPU.lpc.txt

...........\...........\..\PipelineCPU.map.bpm

...........\...........\..\PipelineCPU.map.cdb

...........\...........\..\PipelineCPU.map.ecobp

...........\...........\..\PipelineCPU.map.hdb

...........\...........\..\PipelineCPU.map.kpt

...........\...........\..\PipelineCPU.map.logdb

...........\...........\..\PipelineCPU.map.qmsg

...........\...........\..\PipelineCPU.map_bb.cdb

...........\...........\..\PipelineCPU.map_bb.hdb

...........\...........\..\PipelineCPU.map_bb.logdb

...........\...........\..\PipelineCPU.pre_map.cdb

...........\...........\..\PipelineCPU.pre_map.hdb

...........\...........\..\PipelineCPU.rpp.qmsg

...........\...........\..\PipelineCPU.rtlv.hdb

...........\...........\..\PipelineCPU.rtlv_sg.cdb

...........\...........\..\PipelineCPU.rtlv_sg_swap.cdb

...........\...........\..\PipelineCPU.sgate.rvd

...........\...........\..\PipelineCPU.sgate_sm.rvd

...........\...........\..\PipelineCPU.sgdiff.cdb

...........\...........\..\PipelineCPU.sgdiff.hdb

...........\...........\..\PipelineCPU.sim.cvwf

...........\...........\..\PipelineCPU.sim.hdb

...........\...........\..\PipelineCPU.sim.qmsg

...........\...........\..\PipelineCPU.sim.rdb

...........\...........\..\PipelineCPU.simfam

...........\...........\..\PipelineCPU.sld_design_entry.sci

...........\...........\..\PipelineCPU.sld_design_entry_dsc.sci

...........\...........\..\PipelineCPU.sta.qmsg

...........\...........\..\PipelineCPU.sta.rdb

...........\...........\..\PipelineCPU.syn_hier_info

...........\...........\..\PipelineCPU.tan.qmsg

...........\...........\..\PipelineCPU.tis_db_list.ddb

...........\...........\..\PipelineCPU.tmw_info

...........\...........\..\PipelineCPU_global_asgn_op.abo

...........\...........\..\prev_cmp_PipelineCPU.asm.qmsg

...........\...........\..\prev_cmp_PipelineCPU.fit.qmsg

...........\...........\..\prev_cmp_PipelineCPU.map.qmsg

...........\...........\..\prev_cmp_PipelineCPU.qmsg

...........\...........\..\prev_cmp_PipelineCPU.sim.qmsg

...........\...........\..\prev_cmp_PipelineCPU.sta.qmsg

...........\...........\..\prev_cmp_PipelineCPU.tan.qmsg

...........\...........\..\wed.wsf

...........\...........\incremental_db\compiled_partitions\PipelineCPU.root_partition.cmp.atm

...........\...

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