文件名称:an495_design_example
- 所属分类:
- VHDL编程
- 资源属性:
- 上传时间:
- 2018-01-26
- 文件大小:
- 417kb
- 下载次数:
- 0次
- 提 供 者:
- yello******
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
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ALTERA ers that having account in so they can help you to get your files. But to prevent overloading and abusing; We have some.ers that having account in so they can help you to get your files. But to prevent overloading and abusing; We have some.
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下载文件列表
文件名 | 大小 | 更新时间 |
---|---|---|
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\code | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\code\idecontroller.v | 12415 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\idecontroller.cr.mti | 1234 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\idecontroller.mpf | 10005 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\idecontroller.v | 12415 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\ide_testbench.v | 7662 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\vsim.wlf | 40960 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\wave.bmp | 492094 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\wave.do | 2330 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\downcounter | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\downcounter\verilog.psm | 6782 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\downcounter\_primary.dat | 655 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\downcounter\_primary.vhd | 542 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idecontroller | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idecontroller\verilog.psm | 11629 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idecontroller\_primary.dat | 1190 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idecontroller\_primary.vhd | 1433 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idetestbench | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idetestbench\verilog.psm | 38279 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idetestbench\_primary.dat | 4254 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\idetestbench\_primary.vhd | 144 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\ide_cntrl | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\ide_cntrl\verilog.psm | 26586 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\ide_cntrl\_primary.dat | 2079 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\ide_cntrl\_primary.vhd | 1673 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\piomodecontroller | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\piomodecontroller\verilog.psm | 24955 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\piomodecontroller\_primary.dat | 1987 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\piomodecontroller\_primary.vhd | 1012 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\runoncecounter | 0 | 2007-11-01 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\runoncecounter\verilog.psm | 6504 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\runoncecounter\_primary.dat | 621 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\runoncecounter\_primary.vhd | 505 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\modelsim\work\_info | 2196 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus | 0 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db | 0 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(0).cnf.cdb | 2562 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(0).cnf.hdb | 1556 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(1).cnf.cdb | 4892 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(1).cnf.hdb | 1875 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(2).cnf.cdb | 3622 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(2).cnf.hdb | 1737 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(3).cnf.cdb | 1758 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(3).cnf.hdb | 706 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(4).cnf.cdb | 2188 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.(4).cnf.hdb | 783 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.asm.qmsg | 2049 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.asm_labs.ddb | 14620 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cbx.xml | 95 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cmp.cdb | 28966 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cmp.hdb | 11939 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cmp.logdb | 4 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cmp.rdb | 23010 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cmp.tdb | 27335 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.cmp0.ddb | 54303 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.dbp | 0 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.db_info | 137 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.eco.cdb | 161 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.fit.qmsg | 96555 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.hier_info | 23107 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.hif | 4137 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.map.cdb | 9374 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.map.hdb | 11035 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.map.logdb | 4 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.map.qmsg | 15035 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.pre_map.cdb | 9066 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.pre_map.hdb | 14064 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.psp | 0 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.pss | 0 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.rtlv.hdb | 13998 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.rtlv_sg.cdb | 11847 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.rtlv_sg_swap.cdb | 2325 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.sgdiff.cdb | 7952 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.sgdiff.hdb | 14801 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.signalprobe.cdb | 196 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.sld_design_entry.sci | 154 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.sld_design_entry_dsc.sci | 154 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.syn_hier_info | 0 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.tan.qmsg | 46507 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\db\idecontroller.tis_db_list.ddb | 174 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.asm.rpt | 7959 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.done | 26 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.fit.rpt | 109260 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.fit.smsg | 334 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.fit.summary | 379 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.flow.rpt | 4606 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.map.rpt | 29744 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.map.summary | 373 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.pin | 20493 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.pof | 15024 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.qpf | 912 | 2007-02-26 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.qsf | 2004 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.qws | 90 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.tan.rpt | 137794 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.tan.summary | 1665 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller.v | 12415 | 2007-02-25 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\quartus\idecontroller_assignment_defaults.qdf | 32979 | 2007-11-05 |
AN495_IDE_Controller_Altera_MAX_II_CPLD_Design_Example\testbench | 0 | 2007-11-01 |