设计一个计数器，输入计数脉冲和清零信号，输出2位16进制计数值。计数器的计数规律如下:清零信号有效时输出0，计数脉冲上升沿时，输出由0递增到ff，再递减到1，然后在递增到fe，再递减到2，再递增，按如此规律反复计数。(A counter is designed, the count pulse and the zero signal are input, and the 2 - bit 16 - digit number is output. The counting rule of the counter is as follows: when the cleared signal is effective, the output is 0. When the count pulse rises, the output increases from 0 to FF, then decreases to 1, then increases to Fe, then decreases to 2, and then increases again, counting repeatedly according to this rule.)