RISC_cpu\accum.v

........\addr_decode.v

........\addr_decode.v.bak

........\adr.v

........\alu.v

........\clk_gen.v

........\counter.v

........\cpu.cr.mti

........\cpu.v

........\cpu.v.bak

........\cpu.vt

........\cpu.vt.bak

........\datactl.v

........\.b\logic_util_heursitic.dat

........\..\prev_cmp_risc_cpu.qmsg

........\..\risc_cpu.amm.cdb

........\..\risc_cpu.asm.qmsg

........\..\risc_cpu.asm.rdb

........\..\risc_cpu.asm_labs.ddb

........\..\risc_cpu.cbx.xml

........\..\risc_cpu.cmp.bpm

........\..\risc_cpu.cmp.cdb

........\..\risc_cpu.cmp.hdb

........\..\risc_cpu.cmp.kpt

........\..\risc_cpu.cmp.logdb

........\..\risc_cpu.cmp.rdb

........\..\risc_cpu.cmp_merge.kpt

........\..\risc_cpu.db_info

........\..\risc_cpu.eda.qmsg

........\..\risc_cpu.fit.qmsg

........\..\risc_cpu.hier_info

........\..\risc_cpu.hif

........\..\risc_cpu.idb.cdb

........\..\risc_cpu.lpc.html

........\..\risc_cpu.lpc.rdb

........\..\risc_cpu.lpc.txt

........\..\risc_cpu.map.bpm

........\..\risc_cpu.map.cdb

........\..\risc_cpu.map.hdb

........\..\risc_cpu.map.kpt

........\..\risc_cpu.map.logdb

........\..\risc_cpu.map.qmsg

........\..\risc_cpu.map_bb.cdb

........\..\risc_cpu.map_bb.hdb

........\..\risc_cpu.map_bb.logdb

........\..\risc_cpu.pre_map.cdb

........\..\risc_cpu.pre_map.hdb

........\..\risc_cpu.rpp.qmsg

........\..\risc_cpu.rtlv.hdb

........\..\risc_cpu.rtlv_sg.cdb

........\..\risc_cpu.rtlv_sg_swap.cdb

........\..\risc_cpu.sgate.rvd

........\..\risc_cpu.sgate_sm.rvd

........\..\risc_cpu.sgdiff.cdb

........\..\risc_cpu.sgdiff.hdb

........\..\risc_cpu.sld_design_entry.sci

........\..\risc_cpu.sld_design_entry_dsc.sci

........\..\risc_cpu.smart_action.txt

........\..\risc_cpu.sta.qmsg

........\..\risc_cpu.sta.rdb

........\..\risc_cpu.sta_cmp.6_slow_1200mv_85c.tdb

........\..\risc_cpu.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd

........\..\risc_cpu.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd

........\..\risc_cpu.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd

........\..\risc_cpu.syn_hier_info

........\..\risc_cpu.tiscmp.fast_1200mv_0c.ddb

........\..\risc_cpu.tiscmp.slow_1200mv_0c.ddb

........\..\risc_cpu.tiscmp.slow_1200mv_85c.ddb

........\..\risc_cpu.tis_db_list.ddb

........\incremental_db\compiled_partitions\risc_cpu.db_info

........\..............\...................\risc_cpu.root_partition.cmp.cdb

........\..............\...................\risc_cpu.root_partition.cmp.dfp

........\..............\...................\risc_cpu.root_partition.cmp.hdb

........\..............\...................\risc_cpu.root_partition.cmp.kpt

........\..............\...................\risc_cpu.root_partition.cmp.logdb

........\..............\...................\risc_cpu.root_partition.cmp.rcfdb

........\..............\...................\risc_cpu.root_partition.map.cdb

........\..............\...................\risc_cpu.root_partition.map.dpi

........\..............\...................\risc_cpu.root_partition.map.hbdb.cdb

........\..............\...................\risc_cpu.root_partition.map.hbdb.hb_info

........\..............\...................\risc_cpu.root_partition.map.hbdb.hdb

........\..............\...................\risc_cpu.root_partition.map.hbdb.sig

........\..............\...................\risc_cpu.root_partition.map.hdb

........\..............\...................\risc_cpu.root_partition.map.kpt

........\..............\README

........\machine.v

........\machinectl.v

........\modelsim.ini

........\msim_transcript

........\ram.v

........\register.v

........\risc_cpu.asm.rpt

........\risc_cpu.done

........\risc_cpu.eda.rpt

........\risc_cpu.fit.rpt

........\risc_cpu.fit.smsg

........\risc_cpu.fit.summary

........\risc_cpu.flow.rpt

........\risc_cpu.map.rpt

........\risc_cpu.map.smsg