文件名称:and_beh
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this program is done in verilog hdl and it is program of AND gate BEHVIORAL level modeling program-this program is done in verilog hdl and it is program of AND gate BEHVIORAL level modeling program
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下载文件列表
and_beh\and_beh.qpf
.......\and_beh.qsf
.......\and_beh.qws
.......\and_beh.v
.......\and_beh.v.bak
.......\db\and_beh.asm.qmsg
.......\..\and_beh.asm.rdb
.......\..\and_beh.cbx.xml
.......\..\and_beh.cmp.cdb
.......\..\and_beh.cmp.hdb
.......\..\and_beh.cmp.logdb
.......\..\and_beh.cmp.rdb
.......\..\and_beh.cmp0.ddb
.......\..\and_beh.db_info
.......\..\and_beh.eda.qmsg
.......\..\and_beh.fit.qmsg
.......\..\and_beh.hier_info
.......\..\and_beh.hif
.......\..\and_beh.ipinfo
.......\..\and_beh.lpc.html
.......\..\and_beh.lpc.rdb
.......\..\and_beh.lpc.txt
.......\..\and_beh.map.cdb
.......\..\and_beh.map.hdb
.......\..\and_beh.map.logdb
.......\..\and_beh.map.qmsg
.......\..\and_beh.map.rdb
.......\..\and_beh.pre_map.hdb
.......\..\and_beh.pti_db_list.ddb
.......\..\and_beh.root_partition.map.reg_db.cdb
.......\..\and_beh.rtlv.hdb
.......\..\and_beh.rtlv_sg.cdb
.......\..\and_beh.rtlv_sg_swap.cdb
.......\..\and_beh.sgdiff.cdb
.......\..\and_beh.sgdiff.hdb
.......\..\and_beh.sld_design_entry.sci
.......\..\and_beh.sld_design_entry_dsc.sci
.......\..\and_beh.smart_action.txt
.......\..\and_beh.sta.qmsg
.......\..\and_beh.sta.rdb
.......\..\and_beh.sta_cmp.4_slow.tdb
.......\..\and_beh.syn_hier_info
.......\..\and_beh.tis_db_list.ddb
.......\..\and_beh.tmw_info
.......\..\logic_util_heursitic.dat
.......\..\prev_cmp_and_beh.qmsg
.......\incremental_db\compiled_partitions\and_beh.db_info
.......\..............\...................\and_beh.root_partition.map.kpt
.......\..............\README
.......\output_files\and_beh.asm.rpt
.......\............\and_beh.done
.......\............\and_beh.eda.rpt
.......\............\and_beh.fit.rpt
.......\............\and_beh.fit.summary
.......\............\and_beh.flow.rpt
.......\............\and_beh.jdi
.......\............\and_beh.map.rpt
.......\............\and_beh.map.summary
.......\............\and_beh.pin
.......\............\and_beh.pof
.......\............\and_beh.sta.rpt
.......\............\and_beh.sta.summary
.......\simulation\modelsim\and_beh.sft
.......\..........\........\and_beh.vo
.......\..........\........\and_beh_modelsim.xrf
.......\..........\........\and_beh_v.sdo
.......\incremental_db\compiled_partitions
.......\simulation\modelsim
.......\db
.......\incremental_db
.......\output_files
.......\simulation
and_beh