文件名称:RISC_CPU
介绍说明－－下载内容均来自于网络，请自行研究使用
RISC_CPU 设计练习这是用verilog写的一个基于状态机的简易RISC_CPU的设计，里面包含各个模块，每个模块经过仿真没有问题，整个工程在板子上经过试验。--This is a verilog to write a simple RISC_CPU based state machine design, which contains various modules, each module through simulation without problems, the whole project tested on the board
(系统自动生成,下载前可以参看下载内容)
下载文件列表
RISC_CPU
........\CLKSOURCE.bsf
........\CLKSOURCE.v
........\CLKSOURCE.v.bak
........\accum.bsf
........\accum.v
........\accum.v.bak
........\addr_decode.v
........\adr.bsf
........\adr.v
........\adr.v.bak
........\alu.bsf
........\alu.v
........\alu.v.bak
........\counter.bsf
........\counter.v
........\cpu.asm.rpt
........\cpu.bsf
........\cpu.done
........\cpu.eda.rpt
........\cpu.fit.rpt
........\cpu.fit.smsg
........\cpu.fit.summary
........\cpu.flow.rpt
........\cpu.map.rpt
........\cpu.map.summary
........\cpu.pin
........\cpu.pof
........\cpu.qpf
........\cpu.qsf
........\cpu.qws
........\cpu.sof
........\cpu.tan.rpt
........\cpu.tan.summary
........\cpu.v
........\cpu.v.bak
........\cpu_nativelink_simulation.rpt
........\cputop.v
........\cputop.v.bak
........\datactl.bsf
........\datactl.v
........\datactl.v.bak
........\db
........\..\cpu.asm.qmsg
........\..\cpu.cbx.xml
........\..\cpu.cmp.ecobp
........\..\cpu.cmp.kpt
........\..\cpu.cmp.rdb
........\..\cpu.cmp0.ddb
........\..\cpu.cmp2.ddb
........\..\cpu.cmp_merge.kpt
........\..\cpu.db_info
........\..\cpu.eco.cdb
........\..\cpu.eda.qmsg
........\..\cpu.fit.qmsg
........\..\cpu.hier_info
........\..\cpu.hif
........\..\cpu.lpc.html
........\..\cpu.lpc.rdb
........\..\cpu.lpc.txt
........\..\cpu.map.bpm
........\..\cpu.map.cdb
........\..\cpu.map.ecobp
........\..\cpu.map.hdb
........\..\cpu.map.kpt
........\..\cpu.map.logdb
........\..\cpu.map.qmsg
........\..\cpu.map_bb.cdb
........\..\cpu.map_bb.hdb
........\..\cpu.map_bb.logdb
........\..\cpu.pre_map.cdb
........\..\cpu.pre_map.hdb
........\..\cpu.rpp.qmsg
........\..\cpu.rtlv.hdb
........\..\cpu.rtlv_sg.cdb
........\..\cpu.rtlv_sg_swap.cdb
........\..\cpu.sgate.rvd
........\..\cpu.sgate_sm.rvd
........\..\cpu.sgdiff.cdb
........\..\cpu.sgdiff.hdb
........\..\cpu.sld_design_entry.sci
........\..\cpu.sld_design_entry_dsc.sci
........\..\cpu.smp_dump.txt
........\..\cpu.syn_hier_info
........\..\cpu.tan.qmsg
........\..\cpu.tis_db_list.ddb
........\..\cpu.tmw_info
........\..\cpu_global_asgn_op.abo
........\..\mult_9v01.tdf
........\..\mult_cs01.tdf
........\..\prev_cmp_cpu.asm.qmsg
........\..\prev_cmp_cpu.eda.qmsg
........\..\prev_cmp_cpu.fit.qmsg
........\..\prev_cmp_cpu.map.qmsg
........\..\prev_cmp_cpu.qmsg
........\..\prev_cmp_cpu.tan.qmsg
........\incremental_db
........\..............\README
........\..............\compiled_partitions
........\..............\...................\cpu.root_partition.cmp.atm