文件名称:31_Greedy_snake
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贪吃蛇小游戏 verilogHDL语言描述 基于xilinxsparten6板子 -Snake game verilogHDL descr iption language based xilinxsparten6 board
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31_Greedy_snake\ex5_image_256x256_rom.coe
...............\ex5_over_256x256_rom.coe
...............\greedy_snake.bgn
...............\greedy_snake.bit
...............\Greedy_snake.bld
...............\Greedy_snake.cmd_log
...............\greedy_snake.drc
...............\Greedy_snake.gise
...............\Greedy_snake.lso
...............\Greedy_snake.ncd
...............\Greedy_snake.ngc
...............\Greedy_snake.ngd
...............\Greedy_snake.ngr
...............\Greedy_snake.pad
...............\Greedy_snake.par
...............\Greedy_snake.pcf
...............\Greedy_snake.prj
...............\Greedy_snake.ptwx
...............\Greedy_snake.stx
...............\Greedy_snake.syr
...............\Greedy_snake.twr
...............\Greedy_snake.twx
...............\Greedy_snake.ucf
...............\Greedy_snake.unroutes
...............\Greedy_snake.ut
...............\Greedy_snake.xise
...............\Greedy_snake.xpi
...............\Greedy_snake.xst
...............\Greedy_snake_bitgen.xwbt
...............\Greedy_snake_envsettings.html
...............\Greedy_snake_guide.ncd
...............\Greedy_snake_map.map
...............\Greedy_snake_map.mrp
...............\Greedy_snake_map.ncd
...............\Greedy_snake_map.ngm
...............\Greedy_snake_map.xrpt
...............\Greedy_snake_ngdbuild.xrpt
...............\Greedy_snake_pad.csv
...............\Greedy_snake_pad.txt
...............\Greedy_snake_par.xrpt
...............\Greedy_snake_summary.html
...............\Greedy_snake_summary.xml
...............\Greedy_snake_usage.xml
...............\Greedy_snake_xst.xrpt
...............\ipcore_dir\coregen.cgp
...............\..........\coregen.log
...............\..........\create_ex5_over_rom.tcl
...............\..........\create_ex5_start_rom.tcl
...............\..........\create_Snake_pll.tcl
...............\..........\ex5_over_rom\blk_mem_gen_v7_3_readme.txt
...............\..........\............\doc\blk_mem_gen_v7_3_vinfo.html
...............\..........\............\...\pg058-blk-mem-gen.pdf
...............\..........\............\example_design\ex5_over_rom_exdes.ucf
...............\..........\............\..............\ex5_over_rom_exdes.vhd
...............\..........\............\..............\ex5_over_rom_exdes.xdc
...............\..........\............\..............\ex5_over_rom_prod.vhd
...............\..........\............\implement\implement.bat
...............\..........\............\.........\implement.sh
...............\..........\............\.........\planAhead_ise.bat
...............\..........\............\.........\planAhead_ise.sh
...............\..........\............\.........\planAhead_ise.tcl
...............\..........\............\.........\xst.prj
...............\..........\............\.........\xst.scr
...............\..........\............\simulation\addr_gen.vhd
...............\..........\............\..........\bmg_stim_gen.vhd
...............\..........\............\..........\bmg_tb_pkg.vhd
...............\..........\............\..........\ex5_over_rom_synth.vhd
...............\..........\............\..........\ex5_over_rom_tb.vhd
...............\..........\............\..........\functional\simcmds.tcl
...............\..........\............\..........\..........\simulate_isim.bat
...............\..........\............\..........\..........\simulate_mti.bat
...............\..........\............\..........\..........\simulate_mti.do
...............\..........\............\..........\..........\simulate_mti.sh
...............\..........\............\..........\..........\simulate_ncsim.sh
...............\..........\............\..........\..........\simulate_vcs.sh
...............\..........\............\..........\..........\ucli_commands.key
...............\..........\............\..........\..........\vcs_session.tcl
...............\..........\............\..........\..........\wave_mti.do
...............\..........\............\..........\..........\wave_ncsim.sv
...............\..........\............\..........\random.vhd
...............\..........\............\..........\timing\sim