文件名称:TX_RX

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2016-03-23
  • 文件大小:
  • 3.31mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 冷***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

FPGA用verilog实现串口和电脑的字符串以及单字符精准无误通信,即通过电脑向FPGA发送任一长度数据,FPGA返回PC相同的数据。波特率为9600,本例程为了得到精准的波特率使用了50M时钟的3倍频,测试可用,如有不明的地方,可以给我留言-FPGA implementation using verilog string and the computer serial port and single-character accurate communication, 9600, FPGA using verilog to achieve serial and single-character strings, and the computer communicate accurate and correct, that is, through the computer to the FPGA send any length data, FPGA return PC the same data. 9600 of the routine in order to get accurate baud using a 50M clock multiplier 3, the test can be used, if unknown place, you can give me a message
(系统自动生成,下载前可以参看下载内容)

下载文件列表





TX_RX\db\.cmp.kpt

.....\..\PLL_altpll.v

.....\..\prev_cmp_USART.qmsg

.....\..\USART.asm.qmsg

.....\..\USART.asm.rdb

.....\..\USART.asm_labs.ddb

.....\..\USART.cbx.xml

.....\..\USART.cmp.bpm

.....\..\USART.cmp.cdb

.....\..\USART.cmp.hdb

.....\..\USART.cmp.idb

.....\..\USART.cmp.logdb

.....\..\USART.cmp.rdb

.....\..\USART.cmp_merge.kpt

.....\..\USART.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd

.....\..\USART.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd

.....\..\USART.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd

.....\..\USART.db_info

.....\..\USART.eda.qmsg

.....\..\USART.fit.qmsg

.....\..\USART.hier_info

.....\..\USART.hif

.....\..\USART.logic_util_heuristic.dat

.....\..\USART.lpc.html

.....\..\USART.lpc.rdb

.....\..\USART.lpc.txt

.....\..\USART.map.ammdb

.....\..\USART.map.bpm

.....\..\USART.map.cdb

.....\..\USART.map.hdb

.....\..\USART.map.kpt

.....\..\USART.map.logdb

.....\..\USART.map.qmsg

.....\..\USART.map.rdb

.....\..\USART.map_bb.cdb

.....\..\USART.map_bb.hdb

.....\..\USART.map_bb.logdb

.....\..\USART.pplq.rdb

.....\..\USART.pre_map.hdb

.....\..\USART.pti_db_list.ddb

.....\..\USART.root_partition.map.reg_db.cdb

.....\..\USART.routing.rdb

.....\..\USART.rtlv.hdb

.....\..\USART.rtlv_sg.cdb

.....\..\USART.rtlv_sg_swap.cdb

.....\..\USART.sld_design_entry.sci

.....\..\USART.sld_design_entry_dsc.sci

.....\..\USART.smart_action.txt

.....\..\USART.sta.qmsg

.....\..\USART.sta.rdb

.....\..\USART.sta_cmp.8_slow_1200mv_85c.tdb

.....\..\USART.tiscmp.fastest_slow_1200mv_0c.ddb

.....\..\USART.tiscmp.fastest_slow_1200mv_85c.ddb

.....\..\USART.tiscmp.fast_1200mv_0c.ddb

.....\..\USART.tiscmp.slow_1200mv_0c.ddb

.....\..\USART.tiscmp.slow_1200mv_85c.ddb

.....\..\USART.tis_db_list.ddb

.....\..\USART.vpr.ammdb

.....\greybox_tmp\cbx_args.txt

.....\incremental_db\compiled_partitions\USART.db_info

.....\..............\...................\USART.root_partition.cmp.ammdb

.....\..............\...................\USART.root_partition.cmp.cdb

.....\..............\...................\USART.root_partition.cmp.dfp

.....\..............\...................\USART.root_partition.cmp.hdb

.....\..............\...................\USART.root_partition.cmp.logdb

.....\..............\...................\USART.root_partition.cmp.rcfdb

.....\..............\...................\USART.root_partition.map.cdb

.....\..............\...................\USART.root_partition.map.dpi

.....\..............\...................\USART.root_partition.map.hbdb.cdb

.....\..............\...................\USART.root_partition.map.hbdb.hb_info

.....\..............\...................\USART.root_partition.map.hbdb.hdb

.....\..............\...................\USART.root_partition.map.hbdb.sig

.....\..............\...................\USART.root_partition.map.hdb

.....\..............\...................\USART.root_partition.map.kpt

.....\..............\...................\USART.rrp.hdb

.....\..............\README

.....\output_files\greybox_tmp\cbx_args.txt

.....\............\USART.asm.rpt

.....\............\USART.done

.....\............\USART.eda.rpt

.....\............\USART.fit.rpt

.....\............\USART.fit.smsg

.....\............\USART.fit.summary

.....\............\USART.flow.rpt

.....\............\USART.jdi

.....\............\USART.map.rpt

.....\............\USART.map.smsg

.....\............\USART.map.summary

.....\............\USART.pin

.....\............\USART.sof

.....\............\USART.sta.rpt

.....\............\USART.sta.summary

.....\PLL.ppf

.....\PLL.qip

.....\PLL.v

.....\PLLJ_PLLSPE_INFO.txt

.....\PLL_bb.v

.....\rx_bps.v

.....\rx_bps.v.bak

.....\simulation\modelsim\modelsim.ini

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