文件名称:vga_dis

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2016-03-13
  • 文件大小:
  • 2.97mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 曾*
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  • 下载说明:
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基于FPGA液晶显示驱动,适用初学者了解VGA的工作方式,经测试完全正确,可正常显示图片,图片可自由更改。-FPGA VGA
(系统自动生成,下载前可以参看下载内容)

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vga_dis

.......\20141126.cfi

.......\20141126.mcs

.......\20141126.prm

.......\20141126.sig

.......\20141230.cfi

.......\20141230.mcs

.......\20141230.prm

.......\_ngo

.......\....\cs_icon_pro

.......\....\...........\_xmsgs

.......\....\...........\......\xst.xmsgs

.......\....\...........\coregen.cgc

.......\....\...........\coregen.cgp

.......\....\...........\coregen.log

.......\....\...........\generate_icon_pro.xco

.......\....\...........\icon_pro.gise

.......\....\...........\icon_pro.vhd

.......\....\...........\icon_pro.vho

.......\....\...........\icon_pro.xco

.......\....\...........\icon_pro.xise

.......\....\...........\icon_pro_flist.txt

.......\....\...........\icon_pro_readme.txt

.......\....\...........\icon_pro_xmdf.tcl

.......\....\...........\tmp

.......\....\...........\...\_cg

.......\....\...........\...\_xmsgs

.......\....\...........\...\......\pn_parser.xmsgs

.......\....\cs_ila_pro_0

.......\....\............\_xmsgs

.......\....\............\......\xst.xmsgs

.......\....\............\coregen.cgc

.......\....\............\coregen.cgp

.......\....\............\coregen.log

.......\....\............\generate_ila_pro_0.xco

.......\....\............\ila_pro_0.cdc

.......\....\............\ila_pro_0.gise

.......\....\............\ila_pro_0.vhd

.......\....\............\ila_pro_0.vho

.......\....\............\ila_pro_0.xco

.......\....\............\ila_pro_0.xise

.......\....\............\ila_pro_0_flist.txt

.......\....\............\ila_pro_0_readme.txt

.......\....\............\ila_pro_0_xmdf.tcl

.......\....\............\tmp

.......\....\............\...\_cg

.......\....\............\...\_xmsgs

.......\....\............\...\......\pn_parser.xmsgs

.......\....\icon_pro.ngc

.......\....\ila_pro_0.ngc

.......\....\netlist.lst

.......\....\vga_dis_cs_signalbrowser.ngo

.......\....\vga_dis_cs_signalbrowser.ver

.......\_xmsgs

.......\......\bitgen.xmsgs

.......\......\map.xmsgs

.......\......\netgen.xmsgs

.......\......\ngcbuild.xmsgs

.......\......\ngdbuild.xmsgs

.......\......\par.xmsgs

.......\......\pn_parser.xmsgs

.......\......\trce.xmsgs

.......\......\xst.xmsgs

.......\ipcore_dir

.......\..........\_xmsgs

.......\..........\......\cg.xmsgs

.......\..........\......\pn_parser.xmsgs

.......\..........\coregen.cgp

.......\..........\coregen.log

.......\..........\create_my_dcm.tcl

.......\..........\create_rom.tcl

.......\..........\edit_my_dcm.tcl

.......\..........\my_dcm

.......\..........\......\clk_wiz_v3_2_readme.txt

.......\..........\......\doc

.......\..........\......\...\clk_wiz_ds709.pdf

.......\..........\......\...\clk_wiz_gsg521.pdf

.......\..........\......\...\clk_wiz_v3_2_readme.txt

.......\..........\......\...\clk_wiz_v3_2_vinfo.html

.......\..........\......\example_design

.......\..........\......\..............\my_dcm_exdes.v

.......\..........\......\generate

.......\..........\......\........\clk_wiz_v3_2_generate.tcl

.......\..........\......\........\clk_wiz_v3_2_model.tcl

.......\..........\......\........\run_legacy_tcl_flow.tcl

.......\..........\......\implement

.......\..........\......\.........\implement.bat

.......\..........\......\.........\implement.sh

.......\..........\......\.........\planAhead_ise.bat

.......\..........\......\.........\planAhead_ise.sh

.......\..........\......\.........\planAhead_ise.tcl

.......\..........\......\.........\planAhead_rdn.bat

.......\..........\......\.........\planAhead_rdn.sh

.......\..........\......\.........\planAhead_rdn.tcl

.......\..........\......\.........\xst.prj

.......\..........\......\.........\xst.scr

.......\..........\......\my_dcm.ucf

.......\..........\......\my_dcm.xdc

.......\..........\......\simulation

.......\..........\......\..........\functional

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