文件名称:zonghe
介绍说明－－下载内容均来自于网络，请自行研究使用
Quartus环境下编写的FPGA综合测试程序，能实现频率测量，数码管显示，12864液晶显示，1602液晶显示，点阵扫描显示，AD采样程序，DA输出电压程序，可以通过拨码开关控制上述功能的分别实现，还可以通过遥控器实现上述功能的控制实现。-Quartus environment prepared by the FPGA integrated test program, to achieve frequency measurement, digital display, 12864 LCD, 1602 LCD display, dot matrix scan display, AD sampling program, DA output voltage program, you can control the above functions through the DIP switch Respectively, can also be achieved through the remote control to achieve the above functions.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
zonghe\ADC0804.v
......\ADC0804.v.bak
......\counter.v
......\dac_module.v
......\dac_test.v
......\DA_TLC5620.mif
......\db\add_sub_5ch.tdf
......\..\add_sub_8ch.tdf
......\..\add_sub_9ch.tdf
......\..\add_sub_lkc.tdf
......\..\add_sub_mkc.tdf
......\..\altsyncram_fl71.tdf
......\..\alt_u_div_a5f.tdf
......\..\alt_u_div_c5f.tdf
......\..\alt_u_div_e5f.tdf
......\..\alt_u_div_g2f.tdf
......\..\alt_u_div_h2f.tdf
......\..\alt_u_div_i2f.tdf
......\..\alt_u_div_k5f.tdf
......\..\alt_u_div_m2f.tdf
......\..\alt_u_div_mve.tdf
......\..\alt_u_div_o2f.tdf
......\..\alt_u_div_q5f.tdf
......\..\cntr_b4i.tdf
......\..\FPGA.asm.qmsg
......\..\FPGA.asm.rdb
......\..\FPGA.asm_labs.ddb
......\..\FPGA.cbx.xml
......\..\FPGA.cmp.bpm
......\..\FPGA.cmp.cdb
......\..\FPGA.cmp.hdb
......\..\FPGA.cmp.idb
......\..\FPGA.cmp.kpt
......\..\FPGA.cmp.logdb
......\..\FPGA.cmp.rdb
......\..\FPGA.cmp0.ddb
......\..\FPGA.cmp1.ddb
......\..\FPGA.cmp2.ddb
......\..\FPGA.cmp_merge.kpt
......\..\FPGA.db_info
......\..\FPGA.fit.qmsg
......\..\FPGA.hier_info
......\..\FPGA.hif
......\..\FPGA.ipinfo
......\..\FPGA.lpc.html
......\..\FPGA.lpc.rdb
......\..\FPGA.lpc.txt
......\..\FPGA.map.ammdb
......\..\FPGA.map.bpm
......\..\FPGA.map.cdb
......\..\FPGA.map.hdb
......\..\FPGA.map.kpt
......\..\FPGA.map.logdb
......\..\FPGA.map.qmsg
......\..\FPGA.map.rdb
......\..\FPGA.map_bb.cdb
......\..\FPGA.map_bb.hdb
......\..\FPGA.map_bb.logdb
......\..\FPGA.pplq.rdb
......\..\FPGA.pre_map.hdb
......\..\FPGA.pti_db_list.ddb
......\..\FPGA.ram0_hangsaomiao_6bacd367.hdl.mif
......\..\FPGA.ram0_liesaomiao_96442450.hdl.mif
......\..\FPGA.root_partition.map.reg_db.cdb
......\..\FPGA.routing.rdb
......\..\FPGA.rtlv.hdb
......\..\FPGA.rtlv_sg.cdb
......\..\FPGA.rtlv_sg_swap.cdb
......\..\FPGA.sgdiff.cdb
......\..\FPGA.sgdiff.hdb
......\..\FPGA.sld_design_entry.sci
......\..\FPGA.sld_design_entry_dsc.sci
......\..\FPGA.smart_action.txt
......\..\FPGA.smp_dump.txt
......\..\FPGA.sta.qmsg
......\..\FPGA.sta.rdb
......\..\FPGA.sta_cmp.8_slow.tdb
......\..\FPGA.syn_hier_info
......\..\FPGA.tis_db_list.ddb
......\..\FPGA.vpr.ammdb
......\..\logic_util_heursitic.dat
......\..\lpm_divide_0dm.tdf
......\..\lpm_divide_2gm.tdf
......\..\lpm_divide_35m.tdf
......\..\lpm_divide_dem.tdf
......\..\lpm_divide_eem.tdf
......\..\lpm_divide_fem.tdf
......\..\lpm_divide_g6m.tdf
......\..\lpm_divide_gem.tdf
......\..\lpm_divide_h6m.tdf
......\..\lpm_divide_hem.tdf
......\..\lpm_divide_i6m.tdf
......\..\lpm_divide_qfm.tdf
......\..\lpm_divide_rfm.tdf
......\..\lpm_divide_sfm.tdf
......\..\lpm_divide_t7m.tdf
......\..\lpm_divide_vfm.tdf
......\..\prev_cmp_FPGA.qmsg
......\..\sign_div_unsign_4nh.tdf
......\..\sign_div_unsign_5nh.tdf