文件名称:Counter
介绍说明－－下载内容均来自于网络，请自行研究使用
采用HDL语言，实现计数器的功能，这个在程序设计中很常见。-The counter is design by HDL.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Counter\component\work\b\b.cxf
.......\.........\....\.\b.sdb
.......\counter.prj
.......\designer\impl1\counter.adb
.......\........\.....\........dtf\verify.log
.......\........\.....\counter.ide_des
.......\........\.....\counter.pdb
.......\........\.....\counter.pdb.depends
.......\........\.....\counter.tcl
.......\........\.....\counter1.adb
.......\........\.....\counter1.ide_des
.......\........\.....\counter1.tcl
.......\........\.....\counter_1.adb
.......\........\.....\counter_1.ide_des
.......\........\.....\........fp\$$FlashPro_FPBBALTLPT1.L$$
.......\........\.....\..........\counter.log
.......\........\.....\..........\counter.pro
.......\........\.....\..........\projectData\counter.pdb
.......\........\.....\designer.log
.......\hdl\counter.v
.......\...\waveperl.log
.......\simulation\modelsim.ini
.......\..........\modelsim.ini.sav
.......\.martgen\comparator\comparator.cxf
.......\........\..........\comparator.gen
.......\........\..........\comparator.log
.......\........\..........\comparator.v
.......\........\smartgen.aws
.......\.timulus\BtimErrors.log
.......\........\counter.dsk
.......\........\counter.hpj
.......\........\files_to_build.txt
.......\........\waveperl.log
.......\.ynthesis\backup\counter.srr
.......\.........\counter.areasrr
.......\.........\counter.edn
.......\.........\counter.fse
.......\.........\counter.htm
.......\.........\counter.map
.......\.........\counter.sap
.......\.........\counter.sdf
.......\.........\counter.so
.......\.........\counter.srd
.......\.........\counter.srm
.......\.........\counter.srr
.......\.........\counter.srs
.......\.........\counter.tlg
.......\.........\counter1.areasrr
.......\.........\counter1.edn
.......\.........\counter1.map
.......\.........\counter1.sdf
.......\.........\counter1.so
.......\.........\counter1.srd
.......\.........\counter1.srm
.......\.........\counter1.srr
.......\.........\counter1.srs
.......\.........\counter1.tlg
.......\.........\counter1_sdc.sdc
.......\.........\counter1_syn.prj
.......\.........\counter_sdc.sdc
.......\.........\counter_syn.prj
.......\.........\run_options.txt
.......\.........\stdout.log
.......\.........\.yntmp\counter.msg
.......\.........\......\counter.plg
.......\.........\......\counter1.msg
.......\.........\......\counter1.plg
.......\.........\......\counter_flink.htm
.......\.........\......\counter_srr.htm
.......\.........\......\counter_toc.htm
.......\.........\......\sap.log
.......\viewdraw\vf\project.lst
.......\........\viewdraw.ini
.......\designer\impl1\counter_fp\projectData
.......\component\work\b
.......\designer\impl1\counter.dtf
.......\........\.....\counter1.dtf
.......\........\.....\counter_fp
.......\........\.....\simulation
.......\component\work
.......\designer\impl1
.......\smartgen\comparator
.......\.ynthesis\backup
.......\.........\coreip
.......\.........\syntmp
.......\viewdraw\sch
.......\........\sym
.......\........\vf
.......\........\wir
.......\component
.......\constraint
.......\coreconsole
.......\designer
.......\hdl
.......\phy_synthesis
.......\simulation
.......\smartgen
.......\stimulus
.......\synthesis
.......\viewdraw