文件名称:Parallel-To-Serial-Converter
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Verilog Module for 8-Bit Loadable Serial/Parallel-In Parallel-Out Shift Registers with Clock Enable and Asynchronous Clear
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Parallel To Serial Converter\Parallel To Serial Converter Bus.SchDoc
............................\Parallel To Serial Converter.PrjFpg
............................\Parallel To Serial Converter.PrjFpgStructure
............................\Parallel To Serial Converter.SchDoc
............................\shift_reg_bitblasted.v
............................\TestBench.v
Parallel To Serial Converter