AudioDelay_12bit

................\test_pwm.ucf

................\digital_adc_cmp.sym

................\fuse.xmsgs

................\test_dco_rf_guide.ncd

................\pinlock.rpt

................\bram_2s_x_1k_x_12.cmd_log

................\ipcore_dir

................\planAhead.ngc2edif.log

................\top_bitgen.xwbt

................\digital_adc_root_WITHOUT_FILTERS.sch

................\pwm_constants.vhd

................\delay_unit_2s.sym

................\icmd_p_prom.cmd

................\mapphyssynthesis_old.xds

................\clk_div_4096.sym

................\top.twx.html

................\digital_adc_acc.jhd

................\icmd_g_prom.cmd

................\delay_selector_ud.vhd

................\clock_generator.jhd

................\reg_12.sym

................\smartxplorer_results

................\dco_rf_tb.vhd

................\top.xdl

................\audio_min_max_finder_u.cmd_log

................\bram_2s_x_1k_x_12.jhd

................\pwm_generator.sym

................\reg_12_r.sym

................\top.prm

................\delay_unit_2s.cmd_log

................\counter_12s_sr.cmd_log

................\bus_12_to_16_2_vhdl.prj

................\iseconfig

................\.........\AudioDelay_12bit.projectmgr

................\.........\test_pwm.xreport

................\.........\top.xreport

................\.........\AudioDelay.projectmgr

................\test_adc.sch

................\top.sch

................\test_dco_rf.sch

................\audio_min_max_finder_s.cmd_log

................\test_clock_generator.ucf

................\digital_adc_ctr.sym

................\test_delay_line_guide.ncd

................\dco_rf.vhd

................\bus_16_2_to_12.cmd_log

................\clk_div_16384.sym

................\default.xreport

................\d_adc_acc_control.sym

................\clock_generator.cmd_log

................\clock_generator.sch

................\top_guide.ncd

................\d_adc_acc_control_WITH_SCALING.vhd

................\bus_12_to_16_2.sym

................\audio_min_max_finder_u.vhd

................\pa.fromNetlist.tcl

................\d_adc_acc_control_SIMPLE.vhd

................\clock_generator.sym

................\clk_div_16.sym

................\d_adc_acc_control.vhd

................\counter_10.sym

................\digital_adc_root.jhd

................\sch2HdlBatchFile

................\test_delay_line.ucf

................\test_lpf.ucf

................\bus_16_2_to_12.sym

................\counter_12_half.cmd_log

................\top.cfi

................\test_delay_line.jhd

................\lpf_rc_audio.cmd_log

................\planAhead_pid3755.debug

................\pwm_generator_ex.vhd

................\audio_min_max_finder_s.sym

................\test_dco_rf_bitgen.xwbt

................\planAhead_pid3635.debug

................\test_pwm.sch

................\counter_12s_sr.sym

................\pwm_generator_ex.sym

................\test_clock_generator_bitgen.xwbt

................\test_clock_generator.jhd

................\test_adc_guide.ncd

................\fuseRelaunch.cmd

................\reg_12.vhd

................\bus_12_to_16_2.vhd

................\top.ucf

................\test_clock_generator.sch

................\test_pwm.jhd

................\counter_12_half.sym

................\audio_min_max_finder_s.vhd

................\digital_adc_cmp.vhd

................\clk_div_16384.vhd

................\test_clock_generator_guide.ncd

................\bus_16_2_to_12.vhd

................\clk_div_512.vhd

................\digital_adc_acc.sym

................\reg_12_r.vhd

................\_xmsgs

................\......\xdl.xmsgs

................\mux_5x12.sym