文件名称:RD1213_Video_Pipeline
介绍说明－－下载内容均来自于网络，请自行研究使用
This document describes the structure and implementation of a video pipeline demo design running in the Lattice
ECP3-150EA-8FN1156C device based on the Sparrowhawk FX Board. This demo takes two of the four video
streams DVI and SDI inputs and then combines them into one with different configuration modes.-This document describes the structure and implementation of a video pipeline demo design running in the Lattice
ECP3-150EA-8FN1156C device based on the Sparrowhawk FX Board. This demo takes two of the four video
streams DVI and SDI inputs and then combines them into one with different configuration modes.
ECP3-150EA-8FN1156C device based on the Sparrowhawk FX Board. This demo takes two of the four video
streams DVI and SDI inputs and then combines them into one with different configuration modes.-This document describes the structure and implementation of a video pipeline demo design running in the Lattice
ECP3-150EA-8FN1156C device based on the Sparrowhawk FX Board. This demo takes two of the four video
streams DVI and SDI inputs and then combines them into one with different configuration modes.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
video_pipeline.bit
par
...\.floorplanner.ini
...\.run_manager.ini
...\.setting.ini
...\.spreadsheet_view.ini
...\.spread_sheet.ini
...\blk2_text_index.mem
...\blk3_text_index.mem
...\chip.v
...\menu.mem
...\osd_text.mem
...\pcs_hdmi_10b.txt
...\pcs_sdi.txt
...\prom_init.mem
...\reportview.xml
...\video_pipeline.ccl
...\video_pipeline.ldf
...\video_pipeline.lpf
...\video_pipeline.rva
...\video_pipeline.rvl
...\video_pipeline.rvs
...\video_pipeline.svf
...\video_pipeline.trc
...\video_pipeline.xcf
...\video_pipeline1.sty
...\video_pipeline_tcl.html
...\video_pipeline_video_pipeline.hub
source
......\blk2_text_index.mem
......\blk3_text_index.mem
......\data_switch_diff_clk.v
......\ddr3_sdram_mem_top.v
......\dout_sdi_and_hdmi.v
......\framer.v
......\hdmi_rec_to_dsp.v
......\hdmi_rx_tx.v
......\hdmi_tx_color_bar.v
......\hdmi_tx_sync_1080p.v
......\ip
......\..\csc
......\..\...\pmi_dsp_multoppeEoo1910pA182cfef2e1.ngo
......\..\...\pmi_dsp_multoppeEoo1910pA182cfef2e1_0.ngo
......\..\...\pmi_dsp_multoppeEoo1910pA182cfef2e1_1.ngo
......\..\...\pmi_dsp_multoppeEoo1910pA182cfef2e1_2.ngo
......\..\...\pmi_dsp_multoppeEoo1910pA182cfef2e1_3.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_0.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_1.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_2.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_3.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_4.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_5.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_6.ngo
......\..\...\pmi_dsp_multoppeEoo198pA182ced1e84_7.ngo
......\..\...\rgb_to_ycbcr.ipx
......\..\...\rgb_to_ycbcr.lpc
......\..\...\rgb_to_ycbcr.ngo
......\..\...\rgb_to_ycbcr_bb.v
......\..\...\ycbcr_to_rgb.ipx
......\..\...\ycbcr_to_rgb.lpc
......\..\...\ycbcr_to_rgb.ngo
......\..\...\ycbcr_to_rgb_bb.v
......\..\ddr3_32b_0
......\..\..........\ddr3_32b_0.ipx
......\..\..........\ddr3_32b_0.lpc
......\..\..........\ddr3_32b_0.ngo
......\..\..........\ddr3_32b_0_bb.v
......\..\..........\ddr_p_eval
......\..\..........\..........\ddr3_32b_0
......\..\..........\..........\..........\impl
......\..\..........\..........\..........\....\ddr3_sdram_mem_top_wrapper.v
......\..\..........\..........\..........\....\precision
......\..\..........\..........\..........\....\.........\ddr3_32b_0_eval.ldf
......\..\..........\..........\..........\....\.........\ddr3_32b_0_eval.lpf
......\..\..........\..........\..........\....\.........\ddr3_32b_0_eval.sty
......\..\..........\..........\..........\....\.........\post_route_trace.prf
......\..\..........\..........\..........\....\synplify
......\..\..........\..........\..........\....\........\ddr3_32b_0_eval.ldf
......\..\..........\..........\..........\....\........\ddr3_32b_0_eval.lpf
......\..\..........\..........\..........\....\........\ddr3_32b_0_eval.sty
......\..\..........\..........\..........\....\........\post_route_trace.prf
......\..\..........\..........\..........\sim
......\..\..........\..........\..........\...\aldec
......\..\..........\..........\..........\...\.....\ddr3_32b_0_eval.do
......\..\..........\..........\..........\...\.....\ddr3_32b_0_gatesim_precision.do
......\..\..........\..........\..........\...\.....\ddr3_32b_0_gatesim_synplify.do
......\..\..........\..........\..........\...\modelsim
......\..\..........\..........\..........\...\........\ddr3_32b_0_eval.do
......\..\..........\..........\..........\...\........\ddr3_32b_0_gatesim_precision.do
......\..\..........\..........\..........\...\........\ddr3_32b_0_gatesim_synplify.do
......\..\..........\..........\..........\...\........\wave.do
......\..\..........\..........\..........\src
......\..\..........\..........\..........\...\params
......\..\..........\..........\..........\...\......\ddr3_sdram_mem_params.v
......\..\..........\..........\..........\...\rtl
......\..\..........\..........\..........\...\...\top
......\..\..........\..........\..........\...\...\...\ecp3
......\..\..........\..........\...