文件名称:FSM
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这是一个有限状态机的设计，并且用来测试一个学列，七段数码管输出检测序列的值，有限状态机用三段式编写。-
This is a finite state machine design, and used to test a school, seven-segment digital output detection sequence value, the finite state machine with three-stage preparation.
This is a finite state machine design, and used to test a school, seven-segment digital output detection sequence value, the finite state machine with three-stage preparation.
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下载文件列表
display.v
top.v
tremble.v
FSM.v