文件名称:3-8
介绍说明－－下载内容均来自于网络，请自行研究使用
38译码器基于FPGA的详尽的Verilog HDL源码，可实现拨动开关小灯对应亮灭-38 decoder design
(系统自动生成,下载前可以参看下载内容)
下载文件列表
3-8\db\decoder_3to8.asm.qmsg
...\..\decoder_3to8.asm.rdb
...\..\decoder_3to8.cbx.xml
...\..\decoder_3to8.cmp.cdb
...\..\decoder_3to8.cmp.hdb
...\..\decoder_3to8.cmp.logdb
...\..\decoder_3to8.cmp.rdb
...\..\decoder_3to8.cmp0.ddb
...\..\decoder_3to8.db_info
...\..\decoder_3to8.eda.qmsg
...\..\decoder_3to8.fit.qmsg
...\..\decoder_3to8.hier_info
...\..\decoder_3to8.hif
...\..\decoder_3to8.ipinfo
...\..\decoder_3to8.lpc.html
...\..\decoder_3to8.lpc.rdb
...\..\decoder_3to8.lpc.txt
...\..\decoder_3to8.map.cdb
...\..\decoder_3to8.map.hdb
...\..\decoder_3to8.map.logdb
...\..\decoder_3to8.map.qmsg
...\..\decoder_3to8.map.rdb
...\..\decoder_3to8.pplq.rdb
...\..\decoder_3to8.pre_map.cdb
...\..\decoder_3to8.pre_map.hdb
...\..\decoder_3to8.qns
...\..\decoder_3to8.root_partition.map.reg_db.cdb
...\..\decoder_3to8.rtlv.hdb
...\..\decoder_3to8.rtlv_sg.cdb
...\..\decoder_3to8.rtlv_sg_swap.cdb
...\..\decoder_3to8.sas
...\..\decoder_3to8.sgdiff.cdb
...\..\decoder_3to8.sgdiff.hdb
...\..\decoder_3to8.sld_design_entry.sci
...\..\decoder_3to8.sld_design_entry_dsc.sci
...\..\decoder_3to8.smart_action.txt
...\..\decoder_3to8.sta.qmsg
...\..\decoder_3to8.sta.rdb
...\..\decoder_3to8.sta_cmp.10_slow.tdb
...\..\decoder_3to8.syn_hier_info
...\..\decoder_3to8.tis_db_list.ddb
...\..\decoder_3to8.tmw_info
...\..\logic_util_heursitic.dat
...\..\prev_cmp_decoder_3to8.qmsg
...\decoder_3to8.jdi
...\decoder_3to8.qpf
...\decoder_3to8.qsf
...\decoder_3to8.qws
...\decoder_3to8.v
...\decoder_3to8.v.bak
...\decoder_3to8_nativelink_simulation.rpt
...\incremental_db\compiled_partitions\decoder_3to8.db_info
...\..............\...................\decoder_3to8.root_partition.map.kpt
...\..............\README
...\output_files\Chain1.cdf
...\............\Chain2.cdf
...\............\decoder_3to8.asm.rpt
...\............\decoder_3to8.cdf
...\............\decoder_3to8.done
...\............\decoder_3to8.eda.rpt
...\............\decoder_3to8.fit.rpt
...\............\decoder_3to8.fit.summary
...\............\decoder_3to8.flow.rpt
...\............\decoder_3to8.jdi
...\............\decoder_3to8.map.rpt
...\............\decoder_3to8.map.summary
...\............\decoder_3to8.pin
...\............\decoder_3to8.pof
...\............\decoder_3to8.sta.rpt
...\............\decoder_3to8.sta.summary
...\simulation\modelsim\decoder_3to8.sft
...\..........\........\decoder_3to8.vo
...\..........\........\decoder_3to8.vt
...\..........\........\decoder_3to8.vt.bak
...\..........\........\decoder_3to8_modelsim.xrf
...\..........\........\decoder_3to8_run_msim_rtl_verilog.do
...\..........\........\decoder_3to8_run_msim_rtl_verilog.do.bak
...\..........\........\decoder_3to8_run_msim_rtl_verilog.do.bak1
...\..........\........\decoder_3to8_run_msim_rtl_verilog.do.bak2
...\..........\........\decoder_3to8_v.sdo
...\..........\........\modelsim.ini
...\..........\........\msim_transcript
...\..........\........\rtl_work\decoder_3to8\verilog.prw
...\..........\........\........\............\verilog.psm
...\..........\........\........\............\_primary.dat
...\..........\........\........\............\_primary.dbs
...\..........\........\........\............\_primary.vhd
...\..........\........\........\............_vlg_tst\verilog.prw
...\..........\........\........\....................\verilog.psm
...\..........\........\........\....................\_primary.dat
...\..........\........\........\....................\_primary.dbs
...\..........\........\........\....................\_primary.vhd
...\..........\........\........\_info
...\..........\........\........\_vmake
...\..........\........\vsim.wlf
...\..........\........\rtl_work\decoder_3to8
...\..........\........\........\decoder_3to8_vlg_tst
...\..........\........\........\_temp
...\..........\........\rtl_work
...\incremental_db\compiled_partitions