文件名称:InputStage_IO_Board-Original
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基于微处理器dsp28335为主芯片的的外部扩展光纤传输接口的原理图分布利用,利用光纤传输高低电平产生所需的PWM高速抗干扰信号-External extension based on microprocessor mainly dsp28335 chip using the principle of optical fiber transmission interface diagram distribution, using the optical fiber transmission of high and low level to produce the required PWM high speed anti-jamming signal
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下载文件列表
InputStage_IO_Board Original\PcbLib1.PcbLib
............................\PET.OutJob
............................\PET.PrjPcbStructure
............................\PET.pdf
............................\1.SchDoc
............................\1 SCH ECO 2016-7-24 23-33-50.LOG
............................\1 SCH ECO 2016-7-24 23-35-11.LOG
............................\1 SCH ECO 2016-7-24 23-36-46.LOG
............................\PET.Dat
............................\PET1.OutJob
............................\PET1.pdf
............................\InputStage IO Bard.SchDoc
............................\Middle Stage 1 IO Board SCH ECO 2016-7-29 9-48-41.LOG
............................\Middle Stage 1 IO Board.SchDoc
............................\Middle Stage 2 IO Board SCH ECO 2016-7-29 10-19-49.LOG
............................\Middle Stage 3 IO Board SCH ECO 2016-7-29 10-20-25.LOG
............................\Output Stage IO Board SCH ECO 2016-7-29 10-21-14.LOG
............................\Middle Stage 2 IO Board.SchDoc
............................\Middle Stage 3 IO Board.SchDoc
............................\Output Stage IO Board.SchDoc
............................\PET.PrjPcb
............................\History\InputStage IO Bard.~(1).SchDoc.Zip
............................\.......\InputStage IO Bard.~(10).SchDoc.Zip
............................\.......\InputStage IO Bard.~(11).SchDoc.Zip
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............................\.......\InputStage IO Bard.~(2).SchDoc.Zip
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............................\.......\InputStage IO Bard.~(8).SchDoc.Zip
............................\.......\InputStage IO Bard.~(9).SchDoc.Zip
............................\.......\Middle Stage 1 IO Board.~(1).SchDoc.Zip
............................\.......\Middle Stage 1 IO Board.~(2).SchDoc.Zip
............................\.......\Middle Stage 1 IO Board.~(3).SchDoc.Zip
............................\.......\Middle Stage 1 IO Board.~(4).SchDoc.Zip
............................\.......\Middle Stage 1 IO Board.~(5).SchDoc.Zip
............................\.......\Middle Stage 1 IO Board.~(6).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(1).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(2).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(3).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(4).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(5).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(6).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(7).SchDoc.Zip
............................\.......\Middle Stage 2 IO Board.~(8).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(1).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(2).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(3).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(4).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(5).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(6).SchDoc.Zip
............................\.......\Middle Stage 3 IO Board.~(7).SchDo