文件名称:FPGA-Connect4-master

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2016-02-25
  • 文件大小:
  • 1.53mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • bol****
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  • 下载说明:
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Source code for an example VGA controller
(系统自动生成,下载前可以参看下载内容)

下载文件列表





FPGA-Connect4-master

....................\.gitattributes

....................\.gitignore

....................\Lab4.gise

....................\Lab4.xise

....................\README.md

....................\clock.v

....................\connect4.v

....................\debouncer.v

....................\doc

....................\...\Lab 4 Proposal.docx

....................\...\Lab 4 Report.docx

....................\...\images

....................\...\......\demo.jpg

....................\...\......\nexys3.jpg

....................\encoder8_3.v

....................\ipcore_dir

....................\..........\Clock.gise

....................\..........\Clock.xise

....................\..........\Clock50.asy

....................\..........\Clock50.gise

....................\..........\Clock50.ncf

....................\..........\Clock50.sym

....................\..........\Clock50.ucf

....................\..........\Clock50.v

....................\..........\Clock50.veo

....................\..........\Clock50.vhd

....................\..........\Clock50.vho

....................\..........\Clock50.xco

....................\..........\Clock50.xdc

....................\..........\Clock50.xise

....................\..........\Clock50

....................\..........\.......\clk_wiz_v3_6_readme.txt

....................\..........\.......\doc

....................\..........\.......\...\clk_wiz_v3_6_readme.txt

....................\..........\.......\...\pg065_clk_wiz.pdf

....................\..........\.......\example_design

....................\..........\.......\..............\Clock50_exdes.ucf

....................\..........\.......\..............\Clock50_exdes.v

....................\..........\.......\..............\Clock50_exdes.vhd

....................\..........\.......\..............\Clock50_exdes.xdc

....................\..........\.......\implement

....................\..........\.......\.........\implement.bat

....................\..........\.......\.........\implement.sh

....................\..........\.......\.........\planAhead_ise.bat

....................\..........\.......\.........\planAhead_ise.sh

....................\..........\.......\.........\planAhead_ise.tcl

....................\..........\.......\.........\planAhead_rdn.bat

....................\..........\.......\.........\planAhead_rdn.sh

....................\..........\.......\.........\planAhead_rdn.tcl

....................\..........\.......\.........\xst.prj

....................\..........\.......\simulation

....................\..........\.......\..........\Clock50_tb.v

....................\..........\.......\..........\Clock50_tb.vhd

....................\..........\.......\..........\functional

....................\..........\.......\..........\..........\simcmds.tcl

....................\..........\.......\..........\..........\simulate_isim.bat

....................\..........\.......\..........\..........\simulate_isim.sh

....................\..........\.......\..........\..........\simulate_mti.bat

....................\..........\.......\..........\..........\simulate_mti.do

....................\..........\.......\..........\..........\simulate_mti.sh

....................\..........\.......\..........\..........\simulate_ncsim.sh

....................\..........\.......\..........\..........\simulate_vcs.sh

....................\..........\.......\..........\..........\ucli_commands.key

....................\..........\.......\..........\..........\vcs_session.tcl

....................\..........\.......\..........\..........\wave.do

....................\..........\.......\..........\..........\wave.sv

....................\..........\.......\..........\timing

....................\..........\.......\..........\......\Clock50_tb.v

....................\..........\.......\..........\......\Clock50_tb.vhd

....................\..........\.......\..........\......\sdf_cmd_file

....................\..........\.......\..........\......\simcmds.tcl

....................\..........\.......\..........\......\simulate_isim.sh

....................\..........\.......\..........\......\

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