文件名称:miaobiao
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在Quartus II 环境下利用Verilog语言编写的秒表程序，包含模块化器件和仿真波形-In the Quartus II environment, use Verilog language stopwatch procedures, including modular devices and simulation waveforms
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下载文件列表
miaobiao\Block1.bdf
........\block2.bdf
........\db\add_sub_lkc.tdf
........\..\add_sub_mkc.tdf
........\..\alt_u_div_ove.tdf
........\..\logic_util_heursitic.dat
........\..\lpm_divide_1dm.tdf
........\..\lpm_divide_45m.tdf
........\..\prev_cmp_shizhong.qmsg
........\..\shizhong.asm.qmsg
........\..\shizhong.asm.rdb
........\..\shizhong.asm_labs.ddb
........\..\shizhong.cbx.xml
........\..\shizhong.cmp.bpm
........\..\shizhong.cmp.cdb
........\..\shizhong.cmp.hdb
........\..\shizhong.cmp.idb
........\..\shizhong.cmp.kpt
........\..\shizhong.cmp.logdb
........\..\shizhong.cmp.rdb
........\..\shizhong.cmp0.ddb
........\..\shizhong.cmp1.ddb
........\..\shizhong.cmp2.ddb
........\..\shizhong.cmp_merge.kpt
........\..\shizhong.db_info
........\..\shizhong.eda.qmsg
........\..\shizhong.eds_overflow
........\..\shizhong.fit.qmsg
........\..\shizhong.fnsim.hdb
........\..\shizhong.fnsim.qmsg
........\..\shizhong.hier_info
........\..\shizhong.hif
........\..\shizhong.ipinfo
........\..\shizhong.lpc.html
........\..\shizhong.lpc.rdb
........\..\shizhong.lpc.txt
........\..\shizhong.map.ammdb
........\..\shizhong.map.bpm
........\..\shizhong.map.cdb
........\..\shizhong.map.hdb
........\..\shizhong.map.kpt
........\..\shizhong.map.logdb
........\..\shizhong.map.qmsg
........\..\shizhong.map.rdb
........\..\shizhong.map_bb.cdb
........\..\shizhong.map_bb.hdb
........\..\shizhong.map_bb.logdb
........\..\shizhong.pplq.rdb
........\..\shizhong.pre_map.hdb
........\..\shizhong.pti_db_list.ddb
........\..\shizhong.root_partition.map.reg_db.cdb
........\..\shizhong.routing.rdb
........\..\shizhong.rtlv.hdb
........\..\shizhong.rtlv_sg.cdb
........\..\shizhong.rtlv_sg_swap.cdb
........\..\shizhong.sgdiff.cdb
........\..\shizhong.sgdiff.hdb
........\..\shizhong.sim.hdb
........\..\shizhong.sim.qmsg
........\..\shizhong.sim.rdb
........\..\shizhong.sim.vwf
........\..\shizhong.simfam
........\..\shizhong.sld_design_entry.sci
........\..\shizhong.sld_design_entry_dsc.sci
........\..\shizhong.smart_action.txt
........\..\shizhong.sta.qmsg
........\..\shizhong.sta.rdb
........\..\shizhong.sta_cmp.8_slow.tdb
........\..\shizhong.syn_hier_info
........\..\shizhong.tis_db_list.ddb
........\..\shizhong.vpr.ammdb
........\..\sign_div_unsign_bkh.tdf
........\fenping.bsf
........\fenping.v
........\hour.bsf
........\hour.v
........\hour.v.bak
........\incremental_db\compiled_partitions\shizhong.db_info
........\..............\...................\shizhong.root_partition.cmp.ammdb
........\..............\...................\shizhong.root_partition.cmp.cdb
........\..............\...................\shizhong.root_partition.cmp.dfp
........\..............\...................\shizhong.root_partition.cmp.hdb
........\..............\...................\shizhong.root_partition.cmp.kpt
........\..............\...................\shizhong.root_partition.cmp.logdb
........\..............\...................\shizhong.root_partition.cmp.rcfdb
........\..............\...................\shizhong.root_partition.map.cdb
........\..............\...................\shizhong.root_partition.map.dpi
........\..............\...................\shizhong.root_partition.map.hbdb.cdb
........\..............\...................\shizhong.root_partition.map.hbdb.hb_info
........\..............\...................\shizhong.root_partition.map.hbdb.hdb
........\..............\...................\shizhong.root_partition.map.hbdb.sig
........\..............\...................\shizhong.root_partition.map.hdb
........\..............\...................\shizhong.root_partition.map.kpt
........\..............\README
........\minute.bsf
........\minute.v
........\minute.v.bak
........\output_files\fenping.v
........\............\shizhong.asm.rpt
........\............\shizhong.cdf