文件名称:adder_32bits
介绍说明－－下载内容均来自于网络，请自行研究使用
采用“进位选择加法”技术设计32位加法器 Verilog语言编写-32 bit adder
(系统自动生成,下载前可以参看下载内容)
下载文件列表
adder_32bits
............\sim
............\...\32adder.cr.mti
............\...\32adder.mpf
............\...\add_ahead.v.bak
............\...\adder_32bits.v.bak
............\...\transcript
............\...\vsim.wlf
............\...\work
............\...\....\_info
............\...\....\add_ahead
............\...\....\.........\_primary.dat
............\...\....\.........\_primary.vhd
............\...\....\.........\verilog.asm
............\...\....\adder_32bits
............\...\....\............\_primary.dat
............\...\....\............\_primary.vhd
............\...\....\............\verilog.asm
............\...\....\adder_32bits_tb
............\...\....\...............\_primary.dat
............\...\....\...............\_primary.vhd
............\...\....\...............\verilog.asm
............\...\....\mux
............\...\....\...\_primary.dat
............\...\....\...\_primary.vhd
............\...\....\...\verilog.asm
............\src
............\...\add_ahead.v
............\...\adder_32bits.v
............\...\adder_32bits_tb.v
............\...\mux.v
............\实验7 快速加法器的设计和应用.docx