文件名称:SOBLE_VGA

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2015-05-25
  • 文件大小:
  • 1.49mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 马**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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本设计是通过摄像头OV7670采集图像,然后通过FPGA进行边沿检测算法,最后通过VGA进行显示。-This design is through the camera OV7670 capture images, and then through the FPGA edge detection algorithm, and finally through VGA display.
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下载文件列表





SOBLE_VGA

.........\core

.........\....\osd_rom.bsf

.........\....\osd_rom.qip

.........\....\osd_rom.v

.........\....\osd_rom.v.bak

.........\....\osd_rom_wave0.jpg

.........\....\osd_rom_waveforms.html

.........\....\sdram_pll.bsf

.........\....\sdram_pll.ppf

.........\....\sdram_pll.qip

.........\....\sdram_pll.v

.........\....\vip_rom.bsf

.........\....\vip_rom.qip

.........\....\vip_rom.v

.........\dev

.........\...\.qsys_edit

.........\...\..........\filters.xml

.........\...\..........\preferences.xml

.........\...\AX301.tcl

.........\...\PLLJ_PLLSPE_INFO.txt

.........\...\db

.........\...\..\.cmp.kpt

.........\...\..\a_gray2bin_6ib.tdf

.........\...\..\a_graycounter_1lc.tdf

.........\...\..\a_graycounter_577.tdf

.........\...\..\add_sub_8pc.tdf

.........\...\..\add_sub_apc.tdf

.........\...\..\add_sub_bpc.tdf

.........\...\..\add_sub_cpc.tdf

.........\...\..\add_sub_dpc.tdf

.........\...\..\add_sub_epc.tdf

.........\...\..\add_sub_fpc.tdf

.........\...\..\add_sub_nqc.tdf

.........\...\..\add_sub_oqc.tdf

.........\...\..\add_sub_pqc.tdf

.........\...\..\add_sub_qqc.tdf

.........\...\..\add_sub_rqc.tdf

.........\...\..\add_sub_sqc.tdf

.........\...\..\add_sub_tqc.tdf

.........\...\..\add_sub_uqc.tdf

.........\...\..\add_sub_vqc.tdf

.........\...\..\alt_synch_pipe_d98.tdf

.........\...\..\alt_synch_pipe_ud8.tdf

.........\...\..\alt_synch_pipe_vd8.tdf

.........\...\..\altsyncram_8o81.tdf

.........\...\..\altsyncram_mf51.tdf

.........\...\..\cmpr_7ic.tdf

.........\...\..\cmpr_b66.tdf

.........\...\..\cntr_auf.tdf

.........\...\..\dcfifo_4en1.tdf

.........\...\..\dcfifo_nen1.tdf

.........\...\..\ded_mult_oaa1.tdf

.........\...\..\ded_mult_qe91.tdf

.........\...\..\dffpipe_b3c.tdf

.........\...\..\dffpipe_oe9.tdf

.........\...\..\dffpipe_pe9.tdf

.........\...\..\dffpipe_qe9.tdf

.........\...\..\logic_util_heursitic.dat

.........\...\..\mult_add_si74.tdf

.........\...\..\mult_rct.tdf

.........\...\..\mux_j28.tdf

.........\...\..\par_add_o9f.tdf

.........\...\..\prev_cmp_sdram_ov7670_vga.qmsg

.........\...\..\sdram_ov7670_vga.cmp.rdb

.........\...\..\sdram_ov7670_vga.db_info

.........\...\..\sdram_ov7670_vga.map.qmsg

.........\...\..\sdram_ov7670_vga.sld_design_entry.sci

.........\...\..\sdram_ov7670_vga.tis_db_list.ddb

.........\...\..\sdram_pll_altpll.v

.........\...\..\shift_taps_7mn.tdf

.........\...\greybox_tmp

.........\...\...........\cbx_args.txt

.........\...\incremental_db

.........\...\..............\README

.........\...\..............\compiled_partitions

.........\...\..............\...................\sdram_ov7670_vga.db_info

.........\...\output_file.jic

.........\...\output_file.map

.........\...\qmegawiz_errors_log.txt

.........\...\sdram_ov7670_rgb.map

.........\...\sdram_ov7670_rgb565.map

.........\...\sdram_ov7670_vga.asm.rpt

.........\...\sdram_ov7670_vga.cdf

.........\...\sdram_ov7670_vga.done

.........\...\sdram_ov7670_vga.dpf

.........\...\sdram_ov7670_vga.fit.rpt

.........\...\sdram_ov7670_vga.fit.smsg

.........\...\sdram_ov7670_vga.fit.summary

.........\...\sdram_ov7670_vga.flow.rpt

.........\...\sdram_ov7670_vga.jdi

.........\...\sdram_ov7670_vga.map.rpt

.........\...\sdram_ov7670_vga.map.smsg

.........\...\sdram_ov7670_vga.map.summary

.........\...\sdram_ov7670_vga.merge.rpt

.........\...\sdram_ov7670_vga.merge.summary

.........\...\sdram_ov7670_vga.pin

.........\...\sdram_ov7670_vga.qpf

.........\...\sdram_ov7670_vga.qsf

.........\...\sdram_ov7670_vga.qws

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