文件名称:PWM_IP_test

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [C/C++] [源码]
  • 上传时间:
  • 2015-04-09
  • 文件大小:
  • 5.04mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 朱**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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zynq-7000开发板 PWM IP核(VHDL和Verilog)-zynq-7000 PWM IP
(系统自动生成,下载前可以参看下载内容)

下载文件列表





PWM_IP_test

...........\.Xil

...........\planAhead.jou

...........\planAhead.jou_backup

...........\planAhead.log_backup

...........\PWM_IP_test.data

...........\................\cache

...........\................\.....\system_axi_clkgen_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_dma_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_hdmi_tx_16b_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_iic_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_interconnect_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_interconnect_1_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_interconnect_2_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_spdif_tx_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_axi_vdma_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_clock_generator_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_ngc_142ecdc0.edif

...........\................\.....\system_processing_system7_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_pwm_ip_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_stub_ngc_9b3782fd.edif

...........\................\.....\system_util_vector_logic_0_wrapper_ngc_142ecdc0.edif

...........\................\.....\system_vga_flyinglogo_0_wrapper_ngc_142ecdc0.edif

...........\................\constrs_1

...........\................\.........\designprops.xml

...........\................\.........\fileset.xml

...........\................\.........\usercols.xml

...........\................\runs

...........\................\....\impl_1.psg

...........\................\....\runs.xml

...........\................\....\synth_1.psg

...........\................\sources_1

...........\................\.........\chipscope.xml

...........\................\.........\fileset.xml

...........\................\.........\ports.xml

...........\................\wt

...........\................\..\java_command_handlers.wdf

...........\................\..\project.wpc

...........\................\..\webtalk_pa.xml

...........\PWM_IP_test.ppr

...........\PWM_IP_test.runs

...........\................\.jobs

...........\................\.....\job1.bat

...........\................\.....\job1.sh

...........\................\.....\job2.bat

...........\................\.....\job2.sh

...........\................\.....\job3.bat

...........\................\.....\job3.sh

...........\................\impl_1

...........\................\synth_1

...........\PWM_IP_test.sdk

...........\...............\SDK

...........\...............\...\SDK_Export

...........\...............\...\..........\.metadata

...........\...............\...\..........\.........\.lock

...........\...............\...\..........\.........\.log

...........\...............\...\..........\.........\.plugins

...........\...............\...\..........\.........\........\com.xilinx.sdk.targetmanager.ui

...........\...............\...\..........\.........\........\...............................\dialog_settings.xml

...........\...............\...\..........\.........\........\org.eclipse.cdt.core

...........\...............\...\..........\.........\........\....................\.log

...........\...............\...\..........\.........\........\....................\hello_world_0.1352270506348.pdom

...........\...............\...\..........\.........\........\....................\hello_world_bsp_0.1352270507256.pdom

...........\...............\...\..........\.........\........\org.eclipse.cdt.make.core

...........\...............\...\..........\.........\........\.........................\.log

...........\...............\...\..........\.........\........\.........................\hello_world_0.sc

...........\...............\...\..........\.........\........\.........................\specs.c

...........\...............\...\..........\.........\........\.........................\specs.cpp

...........\.....

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