文件名称:divider
- 所属分类：
- 单片机(51,AVR,MSP430等)
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2015-04-01
- 文件大小：
- 513kb
- 下载次数：
- 0次
- 提 供 者：
- 龙**
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
主要是基于VHDL的五位除法器设计，基于eda试验箱的设计。-Five main divider VHDL-based design, based eda chamber design.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
divider\db\divider.asm.qmsg
.......\..\divider.asm_labs.ddb
.......\..\divider.cbx.xml
.......\..\divider.cmp.bpm
.......\..\divider.cmp.cdb
.......\..\divider.cmp.ecobp
.......\..\divider.cmp.hdb
.......\..\divider.cmp.kpt
.......\..\divider.cmp.logdb
.......\..\divider.cmp.rdb
.......\..\divider.cmp.tdb
.......\..\divider.cmp0.ddb
.......\..\divider.cmp2.ddb
.......\..\divider.cmp_merge.kpt
.......\..\divider.db_info
.......\..\divider.eco.cdb
.......\..\divider.eda.qmsg
.......\..\divider.fit.qmsg
.......\..\divider.hier_info
.......\..\divider.hif
.......\..\divider.lpc.html
.......\..\divider.lpc.rdb
.......\..\divider.lpc.txt
.......\..\divider.map.bpm
.......\..\divider.map.cdb
.......\..\divider.map.ecobp
.......\..\divider.map.hdb
.......\..\divider.map.kpt
.......\..\divider.map.logdb
.......\..\divider.map.qmsg
.......\..\divider.map_bb.cdb
.......\..\divider.map_bb.hdb
.......\..\divider.map_bb.logdb
.......\..\divider.pre_map.cdb
.......\..\divider.pre_map.hdb
.......\..\divider.rtlv.hdb
.......\..\divider.rtlv_sg.cdb
.......\..\divider.rtlv_sg_swap.cdb
.......\..\divider.sgdiff.cdb
.......\..\divider.sgdiff.hdb
.......\..\divider.sld_design_entry.sci
.......\..\divider.sld_design_entry_dsc.sci
.......\..\divider.syn_hier_info
.......\..\divider.tan.qmsg
.......\..\divider.tis_db_list.ddb
.......\..\divider.tmw_info
.......\..\divider_global_asgn_op.abo
.......\..\prev_cmp_divider.asm.qmsg
.......\..\prev_cmp_divider.eda.qmsg
.......\..\prev_cmp_divider.fit.qmsg
.......\..\prev_cmp_divider.map.qmsg
.......\..\prev_cmp_divider.qmsg
.......\..\prev_cmp_divider.tan.qmsg
.......\divider.asm.rpt
.......\divider.done
.......\divider.eda.rpt
.......\divider.fit.rpt
.......\divider.fit.smsg
.......\divider.fit.summary
.......\divider.flow.rpt
.......\divider.map.rpt
.......\divider.map.summary
.......\divider.pin
.......\divider.pof
.......\divider.qpf
.......\divider.qsf
.......\divider.qws
.......\divider.sof
.......\divider.tan.rpt
.......\divider.tan.summary
.......\divider.v
.......\divider.v.bak
.......\divider_nativelink_simulation.rpt
.......\divider_tb.v
.......\divider_tb.v.bak
.......\incremental_db\compiled_partitions\divider.root_partition.cmp.atm
.......\..............\...................\divider.root_partition.cmp.dfp
.......\..............\...................\divider.root_partition.cmp.hdbx
.......\..............\...................\divider.root_partition.cmp.kpt
.......\..............\...................\divider.root_partition.cmp.logdb
.......\..............\...................\divider.root_partition.cmp.rcf
.......\..............\...................\divider.root_partition.map.atm
.......\..............\...................\divider.root_partition.map.dpi
.......\..............\...................\divider.root_partition.map.hdbx
.......\..............\...................\divider.root_partition.map.kpt
.......\..............\README
.......\simulation\modelsim\divider.sft
.......\..........\........\divider.vo
.......\..........\........\divider.vt
.......\..........\........\divider_modelsim.xrf
.......\..........\........\divider_run_msim_gate_verilog.do
.......\..........\........\divider_run_msim_gate_verilog.do.bak
.......\..........\........\divider_run_msim_rtl_verilog.do
.......\..........\........\divider_run_msim_rtl_verilog.do.bak
.......\..........\........\divider_run_msim_rtl_verilog.do.bak1
.......\..........\........\divider_run_msim_rtl_verilog.do.bak2
.......\..........\........\divider_run_msim_rtl_verilog.do.bak3
.......\..........\........\divider_run_msim_rtl_verilog.do.bak4
.......\..........\........\divider_run_msim_rtl_verilog.do.bak5
.......\..........\........\divider_run_msim_rtl_verilog.do.bak6