文件名称:bd_psk_decoder20150303
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对DQPSK调制解调技术的FPGA实现进行了比较全面的研究,利用nQpSK调制技术实现了码速20oKbps的调制器。调制载频3.2MHz、带宽18oKHz、带外抑制大于45dB,调制器设计达到预定要求。解调器硬件完成,软件未全部实现,但完成了CIC滤波器、载波跟踪环、位定时同步、并串转换等几个关键模块的设计。对解调器做了实验测试,验证了相关模块设计的正确性,解调器中重要的载波同步功能己能实现-DQPSK modulation and demodulation techniques for FPGA implementation of a more comprehensive study conducted by nQpSK modulation technique to achieve a code rate 20oKbps modulator. Modulated carrier frequency 3.2MHz, bandwidth 18oKHz, band rejection greater than 45dB, modulator design reaches the predetermined requirements. Demodulator hardware, the software is not fully realized, but the completion of the CIC filter, carrier tracking loop, bit timing synchronization, and converts the string design, and several other key modules. Demodulator do laboratory tests to verify the correctness of the design related modules, an important carrier demodulator synchronization has been able to achieve
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..........\goodgood基于FPGA的DMR系统4FSK调制解调的实现_陈磊.caj
..........\OK-基于FPGA的DQPSK调制解调器研究与设计_麦文.caj