文件名称:Multiplier
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我是2014级复旦的研究生。这是用VHDL语言设计的任意的M乘以N位的乘法器。设计中,被除数和乘数的位数是通过参数来设置的,可由你来修改。我已写好了testbench。可放心使用。-I am a 2014 graduate of Fudan University. This is an arbitrary M VHDL language designed by N-bit multiplier. Design, the dividend and the median multiplier is set by the parameter, you can modify. I have written a testbench. Ease of use.
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下载文件列表
MULTIPLIER\CODE
..........\....\bit_multiplier.vhd
..........\....\Multiplier_4x4.vhd
..........\....\Multiplier_4x4_sources.f
..........\....\Multiplier_4x4_tb.vhd
..........\....\Multiplier_NxM.vhd
..........\....\Multiplier_NxM_sources.f
..........\....\Multiplier_NxM_tb.vhd
..........\Title.pdf