文件名称:ieep1.4
介绍说明－－下载内容均来自于网络，请自行研究使用
10-b binary-weighted D/A converter based on
current division is presented. The effective resolution bandwidth
is 5 MHz at a maximum clock frequency of 40 MHz. The circuit
is integrated in a 0.8-pm double-metal CMOS technology and
the chip area is 0.4 mm’.
current division is presented. The effective resolution bandwidth
is 5 MHz at a maximum clock frequency of 40 MHz. The circuit
is integrated in a 0.8-pm double-metal CMOS technology and
the chip area is 0.4 mm’.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ieep1.4.pdf