文件名称:clock
介绍说明--下载内容均来自于网络,请自行研究使用
基于Verilog的多功能数字钟,看代码最好用quartus软件打开看。结合说明文档看。-Multi function digital clock based on Verilog, look at the code is best to use quartus software to open to see. Combined with the documentation see.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
clock\clock.done
.....\clock.flow.rpt
.....\clock.map.rpt
.....\clock.map.summary
.....\clock.qpf
.....\clock.qsf
.....\clock.v
.....\db\clock.cbx.xml
.....\..\clock.cmp.rdb
.....\..\clock.cmp_merge.kpt
.....\..\clock.db_info
.....\..\clock.hier_info
.....\..\clock.hif
.....\..\clock.lpc.html
.....\..\clock.lpc.rdb
.....\..\clock.lpc.txt
.....\..\clock.map.bpm
.....\..\clock.map.cdb
.....\..\clock.map.hdb
.....\..\clock.map.kpt
.....\..\clock.map.logdb
.....\..\clock.map.qmsg
.....\..\clock.map_bb.cdb
.....\..\clock.map_bb.hdb
.....\..\clock.map_bb.logdb
.....\..\clock.pre_map.cdb
.....\..\clock.pre_map.hdb
.....\..\clock.rtlv.hdb
.....\..\clock.rtlv_sg.cdb
.....\..\clock.rtlv_sg_swap.cdb
.....\..\clock.sgdiff.cdb
.....\..\clock.sgdiff.hdb
.....\..\clock.sld_design_entry.sci
.....\..\clock.sld_design_entry_dsc.sci
.....\..\clock.smart_action.txt
.....\..\clock.syn_hier_info
.....\..\clock.tis_db_list.ddb
.....\..\clock.tmw_info
.....\..\logic_util_heursitic.dat
.....\incremental_db\compiled_partitions\clock.db_info
.....\..............\...................\clock.root_partition.map.cdb
.....\..............\...................\clock.root_partition.map.dpi
.....\..............\...................\clock.root_partition.map.hdb
.....\..............\...................\clock.root_partition.map.kpt
.....\..............\README
.....\代码和说明.txt
.....\incremental_db\compiled_partitions
.....\db
.....\incremental_db
clock