文件名称:sclk_switch
介绍说明－－下载内容均来自于网络，请自行研究使用
在有些电路中需要时钟切换，比如某个电路支持高速模式和低速模式，在高速模式下系统工作在125M时钟，在低速模式下系统工作在3M时钟，在这样的设计中需要动态的将时钟从高频切换到低频，或者从低频切换到高频，切换过程可能会出现毛刺，是非常危险的，该程序能够有效的避免这个问题-Need some clock switching circuit, such as a circuit supports high-speed mode and low-speed mode, the system works in 125M clock, the system clock work at 3M, you need a dynamic clock in this design in high-speed mode at low speed mode the high frequency switching to the low frequency, or low to high frequency switch, the switching process glitches may occur, is very dangerous, this program can effectively avoid this problem
(系统自动生成,下载前可以参看下载内容)
下载文件列表
sclk_switch\db\logic_util_heursitic.dat
...........\..\prev_cmp_sclk_switch.map.qmsg
...........\..\prev_cmp_sclk_switch.qmsg
...........\..\sclk_switch.cbx.xml
...........\..\sclk_switch.cmp.rdb
...........\..\sclk_switch.cmp_merge.kpt
...........\..\sclk_switch.db_info
...........\..\sclk_switch.hier_info
...........\..\sclk_switch.hif
...........\..\sclk_switch.lpc.html
...........\..\sclk_switch.lpc.rdb
...........\..\sclk_switch.lpc.txt
...........\..\sclk_switch.map.bpm
...........\..\sclk_switch.map.cdb
...........\..\sclk_switch.map.hdb
...........\..\sclk_switch.map.kpt
...........\..\sclk_switch.map.logdb
...........\..\sclk_switch.map.qmsg
...........\..\sclk_switch.map_bb.cdb
...........\..\sclk_switch.map_bb.hdb
...........\..\sclk_switch.map_bb.logdb
...........\..\sclk_switch.pre_map.cdb
...........\..\sclk_switch.pre_map.hdb
...........\..\sclk_switch.rtlv.hdb
...........\..\sclk_switch.rtlv_sg.cdb
...........\..\sclk_switch.rtlv_sg_swap.cdb
...........\..\sclk_switch.sgdiff.cdb
...........\..\sclk_switch.sgdiff.hdb
...........\..\sclk_switch.sld_design_entry.sci
...........\..\sclk_switch.sld_design_entry_dsc.sci
...........\..\sclk_switch.smart_action.txt
...........\..\sclk_switch.syn_hier_info
...........\..\sclk_switch.tis_db_list.ddb
...........\incremental_db\compiled_partitions\sclk_switch.db_info
...........\..............\...................\sclk_switch.root_partition.map.cdb
...........\..............\...................\sclk_switch.root_partition.map.dpi
...........\..............\...................\sclk_switch.root_partition.map.hbdb.cdb
...........\..............\...................\sclk_switch.root_partition.map.hbdb.hb_info
...........\..............\...................\sclk_switch.root_partition.map.hbdb.hdb
...........\..............\...................\sclk_switch.root_partition.map.hbdb.sig
...........\..............\...................\sclk_switch.root_partition.map.hdb
...........\..............\...................\sclk_switch.root_partition.map.kpt
...........\..............\README
...........\RTL\sclk_switch.jpg
...........\...\sclk_switch.v
...........\...\sclk_switch.v.bak
...........\sclk_switch.done
...........\sclk_switch.flow.rpt
...........\sclk_switch.map.rpt
...........\sclk_switch.map.summary
...........\sclk_switch.qpf
...........\sclk_switch.qpf.bak
...........\sclk_switch.qsf
...........\sclk_switch.qsf.bak
...........\sclk_switch.qws
...........\sclk_switch_assignment_defaults.qdf
...........\详细设计方案\详细设计方案_sclk_switch.doc
...........\incremental_db\compiled_partitions
...........\db
...........\incremental_db
...........\RTL
...........\详细设计方案
sclk_switch