文件名称:S18_UART_IN_HDL

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2015-01-05
  • 文件大小:
  • 3.4mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • flyw*****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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带mif文件的,串口模块,verilog编写,经过检验的。-With mif files, serial module, verilog written proven.
(系统自动生成,下载前可以参看下载内容)

下载文件列表





S18_UART_IN_HDL

...............\Src

...............\...\div1_8m.v

...............\...\filter.v

...............\...\rcvr.v

...............\...\rcvr_tf.v

...............\...\txmit.v

...............\...\txmit_tf.v

...............\...\uart.v

...............\...\uart_if.v

...............\...\uart_if_fixed.v

...............\...\uart_tb.v

...............\func_sim

...............\........\rcvr.v

...............\........\transcript

...............\........\txmit.v

...............\........\txmit_tf.do

...............\........\uart.cr.mti

...............\........\uart.mpf

...............\........\uart.v

...............\........\uart_if.v

...............\........\uart_tb.do

...............\........\uart_tb.v

...............\........\uart_tb_fixed.do

...............\........\vish_stacktrace.vstf

...............\........\vsim.wlf

...............\........\wave.do

...............\........\work

...............\........\....\@u@a@r@t_tb

...............\........\....\...........\_primary.dat

...............\........\....\...........\_primary.vhd

...............\........\....\...........\verilog.asm

...............\........\....\_info

...............\........\....\rcvr

...............\........\....\....\_primary.dat

...............\........\....\....\_primary.vhd

...............\........\....\....\verilog.asm

...............\........\....\txmit

...............\........\....\.....\_primary.dat

...............\........\....\.....\_primary.vhd

...............\........\....\.....\verilog.asm

...............\........\....\uart

...............\........\....\....\_primary.dat

...............\........\....\....\_primary.vhd

...............\........\....\....\verilog.asm

...............\........\....\uart_if

...............\........\....\.......\_primary.dat

...............\........\....\.......\_primary.vhd

...............\........\....\.......\verilog.asm

...............\pro

...............\...\LED_flush.bsf

...............\...\altclklock0.bsf

...............\...\altclklock0.v

...............\...\altclklock0_bb.v

...............\...\async_transmitter.bsf

...............\...\cmp_state.ini

...............\...\db

...............\...\..\altsyncram_0m31.tdf

...............\...\..\altsyncram_8tj.tdf

...............\...\..\altsyncram_9un.tdf

...............\...\..\altsyncram_eh31.tdf

...............\...\..\altsyncram_g5q.tdf

...............\...\..\altsyncram_s931.tdf

...............\...\..\cntr_cs6.tdf

...............\...\..\cntr_gs6.tdf

...............\...\..\cntr_ub7.tdf

...............\...\..\cntr_vt6.tdf

...............\...\..\logic_util_heursitic.dat

...............\...\..\prev_cmp_uart_if.asm.qmsg

...............\...\..\prev_cmp_uart_if.eda.qmsg

...............\...\..\prev_cmp_uart_if.fit.qmsg

...............\...\..\prev_cmp_uart_if.map.qmsg

...............\...\..\prev_cmp_uart_if.qmsg

...............\...\..\prev_cmp_uart_if.sta.qmsg

...............\...\..\prev_cmp_uart_if.tan.qmsg

...............\...\..\uart_if.ae.hdb

...............\...\..\uart_if.asm.qmsg

...............\...\..\uart_if.asm.rdb

...............\...\..\uart_if.asm_labs.ddb

...............\...\..\uart_if.cbx.xml

...............\...\..\uart_if.cmp.bpm

...............\...\..\uart_if.cmp.cbp

...............\...\..\uart_if.cmp.cdb

...............\...\..\uart_if.cmp.ecobp

...............\...\..\uart_if.cmp.hdb

...............\...\..\uart_if.cmp.kpt

...............\...\..\uart_if.cmp.logdb

...............\...\..\uart_if.cmp.rdb

...............\...\..\uart_if.cmp_merge.kpt

...............\...\..\uart_if.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd

...............\...\..\uart_if.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd

...............\...\..\uart_if.db_info

...............\...\..\uart_if.eco.cdb

...............\...\..\uart_if.eda.qmsg

...............\...\..\uart_if.fit.qmsg

...............\...\..\uart_if.hier_info

...............\...\..\uart_if.hif

...............\...\..\uart_if.lpc.html

...............\...\..\uart_if.lpc.rdb

...............\...\..\uart_if.lpc.txt

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