文件名称:ETH_SRC

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2015-12-04
  • 文件大小:
  • 1.2mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 王**
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介绍说明--下载内容均来自于网络,请自行研究使用

网络接口源码实现,使用的是Verilog语言-ethernet Verilog
(系统自动生成,下载前可以参看下载内容)

下载文件列表





ETH_SRC

.......\_xmsgs

.......\......\cg.xmsgs

.......\......\pn_parser.xmsgs

.......\clock_generator.v

.......\coregen.cgp

.......\coregen.log

.......\cpci_mac_lvds.v

.......\create_dcm_core_sys.tcl

.......\create_fifo8_2048.tcl

.......\dcm_core_sys

.......\............\clk_wiz_v3_5_readme.txt

.......\............\doc

.......\............\...\clk_wiz_gsg521.pdf

.......\............\...\clk_wiz_v3_5_readme.txt

.......\............\...\clk_wiz_v3_5_vinfo.html

.......\............\example_design

.......\............\..............\dcm_core_sys_exdes.ucf

.......\............\..............\dcm_core_sys_exdes.v

.......\............\..............\dcm_core_sys_exdes.xdc

.......\............\implement

.......\............\.........\implement.bat

.......\............\.........\implement.sh

.......\............\.........\planAhead_ise.bat

.......\............\.........\planAhead_ise.sh

.......\............\.........\planAhead_ise.tcl

.......\............\.........\planAhead_rdn.bat

.......\............\.........\planAhead_rdn.sh

.......\............\.........\planAhead_rdn.tcl

.......\............\.........\xst.prj

.......\............\.........\xst.scr

.......\............\simulation

.......\............\..........\dcm_core_sys_tb.v

.......\............\..........\functional

.......\............\..........\..........\simcmds.tcl

.......\............\..........\..........\simulate_isim.bat

.......\............\..........\..........\simulate_isim.sh

.......\............\..........\..........\simulate_mti.bat

.......\............\..........\..........\simulate_mti.do

.......\............\..........\..........\simulate_mti.sh

.......\............\..........\..........\simulate_ncsim.sh

.......\............\..........\..........\simulate_vcs.sh

.......\............\..........\..........\ucli_commands.key

.......\............\..........\..........\vcs_session.tcl

.......\............\..........\..........\wave.do

.......\............\..........\..........\wave.sv

.......\............\..........\timing

.......\............\..........\......\dcm_core_sys_tb.v

.......\............\..........\......\sdf_cmd_file

.......\............\..........\......\simcmds.tcl

.......\............\..........\......\simulate_isim.sh

.......\............\..........\......\simulate_mti.bat

.......\............\..........\......\simulate_mti.do

.......\............\..........\......\simulate_mti.sh

.......\............\..........\......\simulate_ncsim.sh

.......\............\..........\......\simulate_vcs.sh

.......\............\..........\......\ucli_commands.key

.......\............\..........\......\vcs_session.tcl

.......\............\..........\......\wave.do

.......\dcm_core_sys.asy

.......\dcm_core_sys.gise

.......\dcm_core_sys.sym

.......\dcm_core_sys.ucf

.......\dcm_core_sys.v

.......\dcm_core_sys.veo

.......\dcm_core_sys.xco

.......\dcm_core_sys.xdc

.......\dcm_core_sys.xise

.......\dcm_core_sys_exdes.ncf

.......\dcm_core_sys_exdes_summary.html

.......\dcm_core_sys_flist.txt

.......\dcm_core_sys_xmdf.tcl

.......\edit_dcm_core_sys.tcl

.......\eth

.......\...\doc

.......\...\...\pg051-tri-mode-eth-mac.pdf

.......\...\...\tri_mode_eth_mac_readme.txt

.......\...\...\tri_mode_eth_mac_v5_5_vinfo.html

.......\...\example_design

.......\...\..............\axi_ipif

.......\...\..............\........\eth_address_decoder.v

.......\...\..............\........\eth_axi4_lite_ipif_wrapper.v

.......\...\..............\........\eth_axi_lite_ipif.v

.......\...\..............\........\eth_counter_f.v

.......\...\..............\........\eth_pselect_f.v

.......\...\..............\........\eth_slave_attachment.v

.......\...\..............\common

.......\...\..............\......\eth_reset_sync.v

.......\...\..............\......\eth_sync_block.v

.......\...\..............\control

.......\...\..............\.......\eth_config_vector_sm.v

.......\...\..............\eth_block.v

.......\...\..............\eth_clk_wiz.v

.......\...\..............\eth_example_design.ucf

.......\...\..............\eth_example_design.v

.......\...\..............\eth_fifo_block.v

.......\

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