文件名称:i2c_master_controller
介绍说明－－下载内容均来自于网络，请自行研究使用
Verilig语言描述的I2C Mater控制器的IP核，已经过实践应用，适合于FPGA I2C接口设计应用。本IP核在Altera QII 15.1软件环境下综合，并且包含基于NiosII Gen2处理器的i2c软件驱动代码。-Verilig language I2C Mater described controller IP core, has been the practical application, suitable for FPGA I2C interface design applications. The IP core at Altera QII 15.1 integrated software environment and includes a processor based on the i2c NiosII Gen2 software driver code.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
i2c_master_controller\Docs\i2c_specs.pdf
.....................\....\I2C_tests.c
.....................\HAL\inc\i2c_opencores.h
.....................\...\src\component.mk
.....................\...\...\i2c_opencores.c
.....................\i2c_master_bit_ctrl.v
.....................\i2c_master_byte_ctrl.v
.....................\i2c_master_controller.v
.....................\i2c_master_controller_hw.tcl
.....................\i2c_master_controller_hw.tcl~
.....................\i2c_master_defines.v
.....................\i2c_master_top.v
.....................\i2c_opencores_sw.tcl
.....................\.nc\i2c_opencores_regs.h
.....................\timescale.v
.....................\HAL\inc
.....................\...\src
.....................\Docs
.....................\HAL
.....................\inc
i2c_master_controller