文件名称:FPGA
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西安交通大学数电FPGA实验代码,使用verilog编写-The code of XJTU s digital electronics experiment, wrote by Verilog.
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下载文件列表
数电实验
........\ADDER
........\.....\ADDER.bld
........\.....\ADDER.cmd_log
........\.....\ADDER.gise
........\.....\ADDER.lso
........\.....\ADDER.ncd
........\.....\ADDER.ngc
........\.....\ADDER.ngd
........\.....\ADDER.ngr
........\.....\ADDER.pad
........\.....\ADDER.par
........\.....\ADDER.pcf
........\.....\ADDER.prj
........\.....\ADDER.ptwx
........\.....\ADDER.stx
........\.....\ADDER.syr
........\.....\ADDER.twr
........\.....\ADDER.twx
........\.....\ADDER.unroutes
........\.....\ADDER.ut
........\.....\ADDER.vhd
........\.....\ADDER.xise
........\.....\ADDER.xpi
........\.....\ADDER.xst
........\.....\ADDER_bitgen.xwbt
........\.....\ADDER_envsettings.html
........\.....\ADDER_guide.ncd
........\.....\ADDER_map.map
........\.....\ADDER_map.mrp
........\.....\ADDER_map.ncd
........\.....\ADDER_map.ngm
........\.....\ADDER_map.xrpt
........\.....\ADDER_ngdbuild.xrpt
........\.....\ADDER_pad.csv
........\.....\ADDER_pad.txt
........\.....\ADDER_par.xrpt
........\.....\ADDER_summary.html
........\.....\ADDER_summary.xml
........\.....\ADDER_usage.xml
........\.....\ADDER_vhdl.prj
........\.....\ADDER_xst.xrpt
........\.....\_ngo
........\.....\....\netlist.lst
........\.....\_xmsgs
........\.....\......\bitgen.xmsgs
........\.....\......\map.xmsgs
........\.....\......\netgen.xmsgs
........\.....\......\ngdbuild.xmsgs
........\.....\......\par.xmsgs
........\.....\......\pn_parser.xmsgs
........\.....\......\trce.xmsgs
........\.....\......\xst.xmsgs
........\.....\adder.bgn
........\.....\adder.bit
........\.....\adder.drc
........\.....\fuse.log
........\.....\fuse.xmsgs
........\.....\fuseRelaunch.cmd
........\.....\ipcore_dir
........\.....\iseconfig
........\.....\.........\ADDER.projectmgr
........\.....\.........\ADDER.xreport
........\.....\isim
........\.....\....\isim_usage_statistics.html
........\.....\....\pn_info
........\.....\....\precompiled.exe.sim
........\.....\....\...................\ieee
........\.....\....\...................\....\p_1367372525.c
........\.....\....\...................\....\p_1367372525.didat
........\.....\....\...................\....\p_1367372525.nt64.obj
........\.....\....\...................\....\p_2592010699.c
........\.....\....\...................\....\p_2592010699.didat
........\.....\....\...................\....\p_2592010699.nt64.obj
........\.....\....\...................\....\p_2717149903.c
........\.....\....\...................\....\p_2717149903.didat
........\.....\....\...................\....\p_2717149903.nt64.obj
........\.....\....\...................\....\p_3499444699.c
........\.....\....\...................\....\p_3499444699.didat
........\.....\....\...................\....\p_3499444699.nt64.obj
........\.....\....\...................\....\p_3620187407.c
........\.....\....\...................\....\p_3620187407.didat
........\.....\....\...................\....\p_3620187407.nt64.obj
........\.....\....\...................\std
........\.....\....\...................\...\textio.c
........\.....\....\...................\...\textio.didat
........\.....\....\...................\...\textio.nt64.obj
........\.....\....\temp
........\.....\....\....\adder.vdb
........\.....\....\....\test_adder1.vdb
........\.....\....\test_ADDER1_isim_beh.exe.sim
........\.....\....\............................\ISimEngine-DesignHierarchy.dbg
........\.....\....\............................\isimcrash.log
........\.....\....\............................\isimkernel.log
........\.....\....\............................\libPortability.dll
........\.....\....\............................\netId.dat
........\.....\....\............................\test_ADDER1_isim_beh.exe
........\.....\....\............................\tmp_save
........\.....\....\............................\........\_1
........\.....\....\............................\work